Trench Fill Process Using Conformal Deposition and Etch-Back

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Solution Overview

Problem

In high-density integrated circuit devices, existing methods struggle to deposit void-free dielectric material in trenches with narrow widths and high aspect ratios, leading to pinch-off conditions and void formation, which can affect device operation by trapping impurities.

Innovation Solution

A 3-step trench fill process involving conformal deposition, etch-back, and high-density plasma (HDP) filling, where a conformal process initially fills the trench, followed by an etch-back to reduce voids, and then HDP is used to complete the fill in etch-back regions, reducing seam exposure and aspect ratio susceptibility to voids.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional deposition techniques are used to fill trenches, then the process is simple and fast, but voids form in the dielectric layer due to pinch-off condition

Engineering Contradiction:
Improvevoid-free trench fillVSAvoiddeposition process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The deposition process is divided into multiple stages: an initial conformal deposition stage followed by a second deposition stage. This segmentation allows the trench to be filled in a controlled manner, preventing pinch-off and void formation while maintaining process manageability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A preliminary conformal deposition is performed before the main filling process. This preliminary action creates a base layer that prevents subsequent pinch-off conditions during the primary deposition phase, ensuring complete trench fill without voids.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If trench width is decreased to achieve higher density, then circuit density increases, but void formation becomes more likely due to higher aspect ratios

Engineering Contradiction:
Improvecircuit densityVSAvoidtrench fill completeness
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The deposition process uses dynamic control of deposition conditions, switching between conformal deposition mode and high-density plasma deposition mode. This dynamic approach adapts to the specific trench geometry, ensuring complete fill even in narrow, high aspect ratio trenches required for high circuit density.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

Deposition parameters such as pressure, temperature, and plasma density are changed between deposition stages. The conformal deposition uses one set of parameters optimized for uniform coverage, while the HDP stage uses different parameters optimized for rapid, void-free filling of narrow trenches.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This process significantly reduces void formation and seam exposure, ensuring more complete trench filling and minimizing the risk of impurity trapping, even in narrow trenches with high aspect ratios, thereby enhancing the reliability of integrated circuit devices.

Implementation Method 1

a conformal process is then performed to deposit a dielectric layer

Methodology Applied
Scientific EffectChemical Vapour Deposition: Chemical Vapour Deposition

Implementation Method 2

a high density plasma (HDP) process is then performed to deposit dielectric material into the etch-back regions

Methodology Applied
Scientific EffectPlasma Enhanced Chemical Vapour Deposition: Plasma Enhanced Chemical Vapour Deposition

Data Source

PatentUS8153502B2Methods for filling trenches in a semiconductor material
Publication Date: 2012.04.10 MICRON TECHNOLOGY INC
  • US8153502B2 patent drawing
  • US8153502B2 patent drawing
  • US8153502B2 patent drawing

AI summary

Methods of filling cavities or trenches. More specifically, methods of filling a cavity or trench in a semiconductor layer are provided. The methods include depositing a first dielectric layer into the trench by employing a conformal deposition process. Next, the first dielectric layer is etched to create a recess in the trench within the first dielectric layer. The recesses are then filled with a second dielectric layer by employing a high density plasma deposition process. The techniques may be particularly useful in filling cavities and trenches having narrow widths and/or high aspect ratios.