Trench-First Copper Interconnection Single Etch Process
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Solution Overview
Problem
The double patterning technique used in semiconductor manufacturing for forming dense line array patterns below 32 nm requires multiple lithography and etch processes, increasing costs and complexity, necessitating a more efficient method to reduce these costs and simplify the process.
Innovation Solution
A trench-first copper interconnection method utilizing a double exposure technique with photoresists acting as hard masks, involving steps such as depositing a dielectric layer, coating and processing photoresists, and using a polymer curing material to form separation films, allowing for simultaneous etching of metal trench and VIA hole structures in a single etch process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If double patterning technique is used to form dense line array pattern below 32 nm, then manufacturing precision is improved, but device complexity and manufacturing cost increase due to multiple lithography and etch processes
Solution Approach 1:
The patent combines the formation of metal trench and VIA hole patterns into a single etch process by using photoresist as a multi-functional hard mask. The photoresist pattern simultaneously defines both the metal trench and VIA hole locations, allowing one etch process to create both features rather than requiring separate etch steps for each feature type.
Solution Approach 2:
The photoresist serves multiple functions: it acts as the hard mask for defining the metal trench pattern, and simultaneously serves as the mask for forming the VIA hole pattern in the subsequent etch process. This multi-functionality eliminates the need for separate masks and reduces the total number of process steps required for double patterning.
2Ease of manufacture
If traditional trench-first dual damascene process is used, then manufacturing process is simple, but productivity decreases due to sequential formation of metal trench and VIA hole requiring multiple etch processes
Solution Approach 1:
The patent merges the metal trench etch and VIA hole etch into a single etch process by using the photoresist pattern as a combined mask. This allows both features to be formed simultaneously in one etch step, thereby increasing manufacturing capacity and reducing the total process time compared to sequential etching methods.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces the number of steps in the dual damascene process, improving manufacturing capacity and lowering costs by integrating metal trench and VIA hole etching into a single etch process, thereby enhancing efficiency and reducing expenses.
Implementation Method 1
coating polymer curing material containing alkoxy group after developing the first photoresist pattern, to cure the first photoresist pattern in the first photoresist
Data Source
AI summary
The present invention relates to manufacturing technology of damascene copper interconnection in the semiconductor manufacturing field, and especially relates to a method to manufacture by trench-first copper interconnection. The method to manufacture trench-first copper interconnection forms metal trench and VIA hole structures in the photoresist which can form a hard mask through exposure and development processes, and then forms metal interconnection lines via etching metal trench and VIA hole in one etch process. The above method replaces the existing.