Trench Gate Semiconductor Structure for Gate Oxide Breakdown Suppression
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional semiconductor devices with trench structures experience dielectric breakdown due to field concentration on the bottom portion of the gate insulating layer when a reverse bias is applied, leading to reduced withstand voltage.
Innovation Solution
A semiconductor device design featuring a trench structure with a second semiconductor layer having an extended portion closer to the second face, a channel region with lower impurity concentration, and additional semiconductor regions formed around the trench to mitigate field concentration, along with a manufacturing method involving ion irradiation to create regions with different conductivity types.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a trench structure is used to form a gate electrode, then device integration and vertical stacking are improved, but field concentration occurs on the bottom portion of the gate insulating layer causing dielectric breakdown
Solution Approach 1:
The patent applies local quality by creating an extended portion of the second semiconductor layer with a different conductivity type (opposite to the first semiconductor layer) positioned specifically at the bottom of the trench. This localized modification changes the electrical properties only where needed - at the trench bottom where field concentration occurs - without altering the overall device structure. The extended portion acts as a local field management zone that prevents dielectric breakdown while maintaining the trench gate structure's integration benefits.
Solution Approach 2:
The patent changes the conductivity type parameter of the semiconductor layer at the trench bottom by forming an extended portion of the second semiconductor layer with conductivity type opposite to the first semiconductor layer. This parameter change (conductivity type) fundamentally alters the electrical field distribution at the critical trench bottom region, preventing field concentration and subsequent dielectric breakdown of the gate insulating layer.
2Measurement precision
If the trench penetrates through all semiconductor layers to reach the first semiconductor layer, then gate control is improved, but field concentration on the gate insulating layer bottom increases
Solution Approach 1:
The extended portion of the second semiconductor layer with opposite conductivity type acts as an intermediary element between the gate electrode and the first semiconductor layer. It mediates the electrical field interaction by providing a buffer zone that prevents direct field concentration on the gate insulating layer bottom, while still allowing the trench to penetrate through all layers for effective gate control.
Solution Approach 2:
The patent converts the potentially harmful field concentration effect into a beneficial field distribution pattern. By positioning the extended portion of the second semiconductor layer at the trench bottom, the harmful concentrated field is transformed into a distributed field pattern that prevents dielectric breakdown, while the trench maintains its full penetration for optimal gate control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively reduces the risk of dielectric breakdown, improves withstand voltage, and lowers the threshold voltage by distributing field concentration, while preventing punch-through phenomena and reducing on-resistance.
Implementation Method 1
irradiating the recessed portion with ion thereby forming a first semiconductor region having a different conductivity type from that of the semiconductor substrate
Data Source
AI summary
A semiconductor device (A1) includes a semiconductor layer having a first face with a trench (3) formed thereon and a second face opposite to the first face, a gate electrode (41), and a gate insulating layer (5). The semiconductor layer includes a first n-type semiconductor layer (11), a second n-type semiconductor layer (12), a p-type semiconductor layer (13), and an n-type semiconductor region (14). The trench (3) is formed so as to penetrate through the p-type semiconductor layer (13) and to reach the second n-type semiconductor layer (12). The p-type semiconductor layer (13) includes an extended portion extending to a position closer to the second face of the semiconductor layer than the trench (3) is. Such structure allows suppressing dielectric breakdown in the gate insulating layer (5).