Trench Power Semiconductor Device Gate Dielectric Segmentation
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Solution Overview
Problem
The existing trench power semiconductor devices face issues with high capacitance and reduced withstand voltage due to the thin oxide layer formed during thermal oxidation, leading to point effects and degradation of gate electrodes under high temperature, which affects the reliability and lifetime of the devices.
Innovation Solution
The implementation of a trench power semiconductor device with a gate electrode structure that includes first, second, and third dielectric layers made of different materials, where the second dielectric layer is selectively etched to avoid forming a point portion at the bottom side of the gate electrode, reducing capacitance and enhancing withstand voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a thermal oxidation process is used to form the oxide layer for isolating the shielding electrode from the gates, then the isolation is achieved, but the oxide layer thickness becomes too thin resulting in higher capacitances between the gates and shielding electrode
Solution Approach 1:
The oxide layer is segmented into multiple layers (first oxide layer and second oxide layer) with different thicknesses and materials. The first oxide layer provides baseline isolation, while the second oxide layer provides enhanced isolation in critical regions, thereby reducing capacitance without requiring a uniformly thick oxide layer throughout.
Solution Approach 2:
Different regions of the oxide layer have different thicknesses and material compositions. The oxide layer thickness is locally increased in regions where capacitance reduction is most critical (near the shielding electrode-gate interfaces), while maintaining thinner regions elsewhere, achieving optimal capacitance reduction with minimal material usage.
2Loss of energy
If the oxide layer thickness is increased to reduce capacitance, then the capacitance between gates and shielding electrode decreases, but the bottom portion of the oxide layer becomes hard to form and remains thin causing point effects
Solution Approach 1:
A first oxide layer is formed preliminarily across the entire surface before the thermal oxidation process. This preliminary oxide layer serves as a foundation that ensures uniform coverage, including at the bottom portions where oxide formation is difficult, preventing point effects while allowing subsequent thickening in specific regions.
Solution Approach 2:
The first oxide layer acts as an intermediary layer that facilitates the formation of the second oxide layer. It provides a uniform base that enables controlled thickening in specific regions through selective oxidation or deposition, ensuring both uniformity and the ability to reduce capacitance where needed.
3Ease of manufacture
If the oxide layer is made thinner to simplify the process, then the fabrication complexity is reduced, but the capacitance increases and the withstand voltage of the gates decreases
Solution Approach 1:
The oxide layer parameters (thickness, material composition) are changed in a controlled manner through a multi-layer structure. The first oxide layer uses standard thermal oxidation parameters for ease of manufacture, while the second oxide layer uses modified parameters (higher thickness, different material composition) to increase withstand voltage and reduce capacitance, achieving both simplicity and high reliability.
4Loss of energy
If a uniform thick oxide layer is formed to reduce capacitance, then the capacitance decreases, but the manufacturing complexity increases and the bottom portion still remains thin due to process limitations
Solution Approach 1:
The oxide layer is segmented into functionally distinct first and second oxide layers. The first oxide layer provides baseline isolation with standard thickness, while the second oxide layer is selectively formed in regions requiring enhanced isolation. This segmentation reduces capacitance effectively while keeping the overall structure manageable and avoiding the complexity of a uniformly thick oxide layer throughout.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively prevents the point effect, improving the withstand voltage and switching speed of the gate electrode while maintaining better thickness uniformity of the dielectric layers, thus enhancing the reliability and performance of the trench power semiconductor device.
Implementation Method 1
The first dielectric layer is formed in the cell trench and has a contour substantially similar to that of an inner wall surface of the cell trench
Implementation Method 2
The second dielectric layer at least covers the lower inner wall. The second dielectric layer is made from a different material than the first dielectric layer
Implementation Method 3
The third dielectric layer covers inner surfaces of the first conductive layer and the second dielectric layer. The shielding electrode is arranged in the cell trench and surrounded by the third dielectric layer to be isolated from the gate electrode
Data Source
AI summary
A trench power semiconductor device is provided. A trench gate structure of the trench power semiconductor device located in a cell trench of an epitaxial layer includes a first dielectric layer, a second dielectric layer, a gate electrode, a third dielectric layer, and a shielding layer. The second dielectric layer is interposed between the first and third dielectric layers, and the second dielectric layer is made from different material than the first dielectric layer. After performing a selective etching step on the second dielectric layer, a recess can be formed among the first, second and third dielectric layers. The gate electrode includes a conductive layer formed in the recess region, and the shielding electrode is surrounded by the third dielectric layer and insulated from the conductive layer.