Trench-Gate Semiconductor Device for High Driving Current
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Solution Overview
Problem
Conventional semiconductor devices with trench gates face challenges in increasing gate channel width without proportionally increasing device size, limiting their ability to handle high currents effectively.
Innovation Solution
The semiconductor device features trench-gate structures with an extending direction perpendicular to the drain-doped region, allowing for multiple trench-gate structures to be spaced apart and increasing the gate channel width by utilizing half the perimeter of the bottom surface of each trench-gate structure, thereby enhancing driving current and reducing device size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the gate channel width is increased to handle higher driving current, then the current handling capability is improved, but the device size increases proportionally
Solution Approach 1:
The patent transitions from a planar gate structure to a three-dimensional trench gate structure that extends vertically into the substrate. The gate channel width is now defined by the perimeter of the trench cross-section rather than a simple linear dimension, allowing current to flow along the trench sidewalls. This dimensional change enables increased effective gate channel width without proportionally increasing the top-down device footprint.
Solution Approach 2:
The trench gate structure is embedded within the substrate, with the gate electrode nested inside the trench cavity. The source and drain regions are positioned around and adjacent to the trench structure, creating a nested spatial arrangement where the active channel forms along the trench perimeter. This nesting allows efficient use of vertical space to increase channel width without expanding horizontal device area.
2Productivity
If the trench-gate structure length is increased to increase gate channel width, then the driving current increases, but the device area increases
Solution Approach 1:
The invention exploits the vertical dimension by etching trenches into the substrate, transforming the gate channel from a two-dimensional planar structure to a three-dimensional structure with significant perimeter surface area. The gate channel width is effectively the perimeter of the trench cross-section, which can be substantial even for small trench footprints, thereby increasing driving current capability without expanding device area.
Solution Approach 2:
The trench gate structure utilizes curved or rounded trench profiles rather than sharp angular geometries. The circular or oval cross-section of the trench maximizes the perimeter-to-area ratio, increasing the effective gate channel width relative to the device footprint. This curvature optimization allows the same device area to support higher driving currents.
Data Source
AI summary
A semiconductor device including a substrate having an active region is disclosed. A field-plate region and a bulk region are in the active region, wherein the bulk region is at a first side of the field-plate region. At least one trench-gate structure is disposed in the substrate corresponding to the bulk region. At least one source-doped region is in the substrate corresponding to the bulk region, wherein the source-doped region surrounds the trench-gate structure. A drain-doped region is in the substrate at a second side opposite to the first side of the field-plate region, wherein an extending direction of length of the trench-gate structure is perpendicular to that of the drain-doped region as viewed from a top view perspective.