Trench Gate Electrode Layout for IGBT Breakdown Resistance
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Solution Overview
Problem
Existing semiconductor devices, particularly IE type IGBTs, face challenges in improving their properties such as hole injection enhancement and reducing parasitic NPN-Bipolar transistor operation, which affects their reliability and breakdown resistance.
Innovation Solution
The semiconductor device incorporates a unique trench gate electrode configuration with three trench gate electrodes arranged apart, including a center trench gate electrode coupled with a gate electrode and two end trench gate electrodes coupled with an emitter electrode, along with a specific layout and manufacturing process that avoids the crossing region of the hybrid cell region and emitter coupling section to prevent parasitic NPN-Bipolar transistor formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional trench gate electrode configuration is used, then the manufacturing process is simpler, but parasitic NPN-Bipolar transistor operation occurs reducing reliability
Solution Approach 1:
The gate electrode system is segmented into three distinct trench gate electrodes (first, second, and third) arranged in a specific pattern. This segmentation allows the device to control electric field distribution and prevent parasitic transistor formation by creating isolated gate regions that manage charge carrier flow more effectively.
Solution Approach 2:
The invention introduces a planar dimension to the gate electrode arrangement by positioning three trench gates in a triangular or linear pattern across the device surface. This two-dimensional arrangement provides better spatial control over the electric field and charge distribution compared to conventional single or dual gate configurations, preventing parasitic transistor activation.
2Ease of manufacture
If the first opening penetrates through the crossing region, then the n+-type emitter region can be accessed, but parasitic NPN-Bipolar transistor formation is triggered
Solution Approach 1:
The first opening is designed with non-uniform positioning: it penetrates the fourth insulating film in the inactive cell region to access the n+-type emitter region, but deliberately avoids the crossing region where the coupling section is located. This local differentiation in opening placement allows emitter access while preventing the formation conditions for parasitic transistors.
Solution Approach 2:
The design converts the potential harm of needing to access the emitter region (which could trigger parasitic transistors) into a benefit by strategically positioning the opening to access the emitter while avoiding the coupling section. The avoidance of the crossing region becomes the protective feature that prevents parasitic transistor formation while maintaining manufacturing feasibility.
3Reliability
If hole discharge to the emitter side is not restricted, then hole injection enhancement is reduced, but breakdown resistance decreases
Solution Approach 1:
The three trench gate electrodes create segmented control regions that manage hole discharge paths. By dividing the gate control into multiple zones, the device can restrict hole discharge to specific regions while maintaining hole injection enhancement in active areas, achieving both reliability improvement and performance maintenance.
Solution Approach 2:
The fourth insulating film acts as an intermediary layer between the inactive cell region and the n+-type emitter region. It provides controlled access points (through the first opening) that mediate hole discharge, allowing enhancement of hole injection while preventing uncontrolled discharge that would trigger parasitic transistors and reduce breakdown resistance.
Data Source
AI summary
A semiconductor device includes trench gate electrodes, an emitter coupling section that couples them with each other, an interlayer insulating film arranged in a hybrid sub-cell region and an inactive cell region, and a contact trench penetrating it. Also, the contact trench is divided in a crossing region of extending directions of the hybrid sub-cell region and the emitter coupling section. Further, an n+-type emitter region is disposed so as to be apart from an end of the divided contact trench. With such configuration of not forming the contact trench in the crossing region, the working failure of the contact trench can be reduced. Also, because the n+-type emitter region is disposed so as to be apart from the end of the contact trench, the breakdown resistance of the semiconductor device can be improved.