Trench Gate FETs with Conductive Drain Runner
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Solution Overview
Problem
Current power transistors, such as LDMOS FETs and trench-gate FETs, face limitations in scaling and integration for high-side and low-side devices in DC-DC converters due to lateral arrangements and complex isolation structures, leading to increased resistance and parasitic impedance.
Innovation Solution
The implementation of trench gate field-effect transistors with a conductive drain runner in a trench gate structure, allowing for front-side drain contact access and monolithic integration, which reduces on-resistance and improves two-dimensional field modulation by using a metal or metal-silicide conductive runner and a superjunction structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If lateral arrangement of power MOSFETs is used for integration, then high-side and low-side devices can be integrated on a single semiconductor device, but scaling opportunities are limited and device size cannot be reduced further
Solution Approach 1:
The patent transitions from lateral (planar) arrangement to vertical arrangement of power MOSFETs. The source, channel, drain and drift regions are stacked vertically rather than extending laterally, enabling significant size reduction while maintaining integration capability. This vertical configuration allows high-side and low-side devices to be integrated on a single die with reduced footprint.
2Ease of operation
If trench-gate FETs with top side drain access are used, then front-side contact is achieved, but two-dimensional electric field modulation is insufficient and on-resistance is high
Solution Approach 1:
The patent implements non-uniform doping concentrations in the drift region, with higher doping near the drain and lower doping near the source. This graded doping profile creates optimal electric field distribution, reducing peak fields near the drain while maintaining adequate fields for carrier injection from the source, thereby reducing on-resistance while maintaining front-side contact access.
Solution Approach 2:
The patent changes the doping concentration parameter throughout the drift region, using a graded profile instead of uniform doping. This parameter variation optimizes the electric field distribution and reduces the specific on-resistance while maintaining the trench-gate structure with front-side drain access.
3Reliability
If shielded-gate trench FETs with backside drain terminals are used, then two-dimensional field modulation is improved, but monolithic integration is difficult and complicated isolation structures are required
Solution Approach 1:
The patent inverts the drain terminal location from backside to front side. By providing drain access through the front surface rather than the backside, the patent eliminates the need for complicated isolation structures between high-side and low-side devices, enabling simple monolithic integration while maintaining improved field modulation through the trench-gate configuration.
Data Source
AI summary
In a general aspect, a field-effect transistor (FET) can include a semiconductor region, and a trench disposed in the semiconductor region. The FET can also include a trench gate disposed in an upper portion of the trench in an active region of the FET. The FET can further include a conductive runner disposed in a bottom portion of the trench. The conductive runner can be electrically coupled with a drain terminal of the FET. A portion of the conductive runner can be disposed in the active region below the trench gate.