Trench Gate FET Void-Free Fill Using Tapered Conductive Liners
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Solution Overview
Problem
Conventional methods for forming high aspect ratio trenches and recesses in semiconductor technology often result in voids, which increase resistivity and degrade device performance by trapping particles or contaminants.
Innovation Solution
A method involving partial filling with a first conductive material, followed by etching to create positive sidewall slopes, and subsequent filling with a second conductive material to achieve void-free trenches and recesses, using conductive liners with tapered edges to ensure complete filling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional filling methods are used for high aspect ratio trenches, then the trench can be filled with conductive material, but voids form inside the trench increasing resistivity
Solution Approach 1:
The filling process is divided into multiple sequential steps: first forming a mandrel structure, then depositing conductive material, followed by selective removal and replacement. This segmentation allows each step to be optimized independently, ensuring complete void-free filling of high aspect ratio trenches while maintaining manufacturing control
Solution Approach 2:
A mandrel structure is formed in advance within the trench before the final conductive material is deposited. This preliminary structure serves as a template that ensures complete filling and prevents void formation, allowing the subsequent conductive material to be deposited conformally without creating empty spaces
2Speed
If trench aspect ratio increases to maintain device performance, then switching speed improves, but void formation becomes more likely
Solution Approach 1:
The mandrel structure is nested within the trench, and the conductive material is deposited around and over this nested structure. This nested approach ensures that even in high aspect ratio trenches where direct filling would create voids, the conductive material completely surrounds the mandrel, guaranteeing void-free filling while maintaining the high aspect ratio needed for fast switching
Data Source
AI summary
A field effect transistor (FET) includes a trench extending into a semiconductor region. A conductive electrode is disposed in the trench, and the conductive electrode is insulated from the semiconductor region by a dielectric layer. The conductive electrode includes a conductive liner lining the dielectric layer along opposite sidewalls of the trench. The conductive liner has tapered edges such that a thickness of the conductive liner gradually increases from a top surface of the conductive electrode to a point in lower half of the conductive electrode. The conductive electrode further includes a conductive fill material sandwiched by the conductive liner. The FET further includes a drift region of a first conductivity type in the semiconductor region, and a body region of a second conductivity type extending over the drift region. Source regions of the first conductivity type extend in the body region adjacent the trench.