Trench Gate Electrode Geometry for Reliable Power Semiconductors

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Solution Overview

Problem

Existing semiconductor devices face challenges in achieving stable electrical characteristics and improved reliability, particularly in high-temperature environments and high-power applications.

Innovation Solution

A semiconductor device is designed with a substrate having a first conductivity type, a first conductivity type epitaxial layer with a gate electrode inside a trench, a gate insulating layer, a source electrode, and doped well regions. The gate electrode has a unique shape with varying side surface angles, and the doped well regions also have angled side surfaces, which together enhance electrical performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional semiconductor devices are used, then manufacturing is simpler, but electrical characteristics are unstable and reliability is poor in high-temperature environments

Engineering Contradiction:
ImprovereliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The gate electrode is divided into multiple sections with different side surface angles (first, second, and third side surfaces with angles α1, α2, and α3 respectively). This segmentation allows each section to perform optimized functions: the first side surface provides strong electric field control, the second side surface reduces impedance, and the third side surface minimizes leakage current, thereby improving overall reliability without requiring complete device redesign

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the gate electrode are given different local properties through varying side surface angles. The first side surface has a larger angle for strong field control, the second side surface has an optimized angle for impedance reduction, and the third side surface has a specific angle for leakage current suppression. This local optimization enhances electrical characteristics while maintaining device stability in high-temperature environments

Inventive Principle:
Principle #3Local quality

2Manufacturing precision

If gate electrode with varying side surface angles is used, then electrical characteristics are improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvemanufacturing precisionVSAvoidease of manufacture
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent specifies concrete parameter ranges for the side surface angles (α1, α2, and α3) to balance performance and manufacturability. By defining specific angle ranges rather than arbitrary values, the patent enables manufacturers to achieve improved electrical characteristics while maintaining reasonable manufacturing precision requirements through controlled parameter variation

Inventive Principle:
Principle #35Parameter changes

3Strength

If doped well regions with angled side surfaces are used, then breakdown voltage is enhanced, but device complexity increases

Engineering Contradiction:
Improvebreakdown voltageVSAvoiddevice complexity
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

The doped well regions are designed with asymmetric angled side surfaces instead of symmetric vertical walls. This asymmetric geometry creates optimized electric field distribution that enhances breakdown voltage by reducing field concentration at corners and improving field uniformity, while the systematic design keeps the complexity increase manageable

Inventive Principle:
Principle #4Asymmetry

Data Source

PatentEP4564436A1Semiconductor device
Publication Date: 2025.06.04 SAMSUNG ELECTRONICS CO LTD
  • EP4564436A1 patent drawingFigure 1
  • EP4564436A1 patent drawingFigure 2
  • EP4564436A1 patent drawingFigure 3

AI summary

The present disclosure relates to a semiconductor device, and a semiconductor device including a substrate (110), a first conductivity type epitaxial layer (131) on a first surface of the substrate and including a first trench(500), a gate electrode (150) inside the first trench, a gate insulating layer (140) between the first conductivity type epitaxial layer and the gate electrode, a source electrode (173) on the first conductivity type epitaxial layer, second conductivity type doped well regions (133) and first conductivity type doped layers (137) between the first conductivity type epitaxial layer and the source electrode, and a drain electrode (175) on a second surface of the substrate, the gate electrode has n number of side surfaces connecting a lower surface and a upper surface, and the angle of the side surfaces of the gate electrode with respect to the lower surface of the gate electrode are different from each other.