Trench Gate Structure With Split Electrodes to Reduce GIDL
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Solution Overview
Problem
Gate Induced Drain Leakage (GIDL) occurs in semiconductor devices due to the overlap of gate electrodes and impurity regions, deteriorating operational reliability and causing interference between memory cells.
Innovation Solution
A semiconductor device design featuring a trench structure with a lower gate electrode, an upper gate electrode, and a thicker dielectric layer between them, formed using thermal oxidation and atomic layer deposition processes, which reduces the effective electric field and allows the electrodes to receive different voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a gate electrode overlaps with impurity regions to achieve compact device layout, then device integration is improved, but Gate Induced Drain Leakage (GIDL) increases and operational reliability deteriorates
Solution Approach 1:
A dielectric layer is introduced as an intermediary substance between the gate electrode and the impurity region. This dielectric layer physically separates the gate electrode from direct contact with the impurity region, thereby reducing the electric field coupling and minimizing GIDL current while preserving the compact overlapping layout for high integration.
Solution Approach 2:
The harmful direct interaction between the gate electrode and impurity region is extracted by removing the conductive path and replacing it with a dielectric material. This extraction eliminates the source of GIDL while maintaining the structural overlap needed for device compactness.
2Reliability
If a thicker dielectric layer is formed between the upper electrode and substrate to reduce effective electric field and GIDL, then operational reliability is improved, but device structure complexity increases
Solution Approach 1:
The dielectric layer is applied locally only in the critical region where the gate electrode overlaps with the impurity region, rather than uniformly throughout the entire device. This localized approach reduces GIDL at the problem area while minimizing the overall structural complexity and material usage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design reduces GIDL, extends data retention time, and enhances operational reliability by minimizing interference between word-lines in memory cells while maintaining good device performance.
Implementation Method 1
a first dielectric layer partially disposed between the lower gate electrode and the upper gate electrode
Implementation Method 2
the second dielectric layer is disposed by a thermal oxidation process
Implementation Method 3
the first dielectric layer is disposed by an atomic layer deposition (ALD) process
Data Source
AI summary
A semiconductor device and a method of manufacturing a semiconductor device are provided. The semiconductor device includes a substrate having a trench and a gate structure in the trench. The trench includes a lower gate electrode, an upper gate electrode over the lower gate electrode and a first dielectric layer partially disposed between the lower gate electrode and the upper gate electrode.