Trench Gate Structure With Dual Conductive Layers to Suppress GIDL
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Solution Overview
Problem
Gate-induced drain leakage (GIDL) is a significant issue in metal oxide semiconductor (MOS) transistors, particularly in dynamic random access memory (DRAM) devices, leading to reduced reliability and increased power consumption due to the reverse biasing of PN junctions and generation of surplus hole-electron pairs.
Innovation Solution
A semiconductor structure is fabricated with a trench in the substrate, featuring a conductive layer with a first and second conductive layer, a dielectric layer, and an isolation layer that defines a void, reducing the drain-to-gate voltage and inhibiting GIDL by improving the gate dielectric layer configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a buried word line (BW) is used in a DRAM access transistor, then the device can be fabricated with conventional processes, but gate-induced drain leakage (GIDL) occurs due to reverse biasing of the PN junction in the drain region
Solution Approach 1:
The gate structure is segmented into two distinct conductive layers: a first conductive layer (e.g., tungsten) and a second conductive layer (e.g., polysilicon). This segmentation allows each layer to serve different functional purposes - the first layer provides mechanical support and basic conductivity, while the second layer provides the appropriate work function for gate control, thereby reducing GIDL without complicating the overall fabrication process
Solution Approach 2:
The gate structure employs composite materials by combining two different conductive materials with distinct properties. The first conductive layer (tungsten) offers high mechanical strength and stability, while the second conductive layer (polysilicon) provides suitable electrical characteristics for gate operation. This composite approach resolves the contradiction by achieving both manufacturability and reduced GIDL through material property optimization
2Productivity
If the dimension of the DRAM device is decreased and the gate oxide layer is thinned, then the device density and integration are improved, but GIDL becomes more obvious and power consumption increases
Solution Approach 1:
The invention changes the electrical parameters of the gate structure by introducing a second conductive layer with specific work function characteristics. This parameter modification allows the gate to better control the channel, reducing the electric field intensity at the drain-gate junction and thereby suppressing GIDL and associated power consumption in scaled-down devices
3Device complexity
If a single conductive layer is used in the gate structure, then the fabrication process is simple, but the gate-induced drain leakage cannot be effectively reduced
Solution Approach 1:
The gate conductive layer is divided into two separate layers with different materials and functions. The first conductive layer serves as a barrier and structural foundation, while the second conductive layer provides optimized electrical control. This segmentation effectively reduces GIDL while maintaining reasonable fabrication complexity through sequential deposition processes
Data Source
AI summary
Embodiments provide a semiconductor structure and a fabricating method. The semiconductor structure includes: a substrate, where a trench is formed in the substrate; a conductive layer positioned in the trench, where the conductive layer includes a first conductive layer and a second conductive layer, the second conductive layer is positioned on the first conductive layer, and a projection area of a bottom of the second conductive layer within the trench is greater than a projection area of a top of the first conductive layer within the trench; a dielectric layer positioned between the conductive layer and an inner wall of the trench, where a top of the dielectric layer is lower than the top of the first conductive layer; an isolation layer positioned on the conductive layer; and a void defined by the isolation layer, the conductive layer, the dielectric layer, and a side wall of the trench.