Trench Gate IGBT Manufacturing via Conductive Layer Division
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Solution Overview
Problem
The existing manufacturing methods for trench gate IGBTs face challenges in completely removing photoresists from narrow trenches, leading to contamination and low yield due to the difficulty in accessing and removing hardened photoresists in concave portions with small widths.
Innovation Solution
The method involves forming a conductive layer within the trench, dividing it into a gate electrode and an in-trench wiring layer, and filling the gap between them with an insulating film, allowing for ion implantation across the entire substrate surface without the need for photoresists, thereby preventing photoresist residue in the trench.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If photoresist is used to define regions during ion implantation in narrow trenches, then selective doping can be achieved, but photoresist cannot be completely removed from the trench leading to contamination and low yield
Solution Approach 1:
The patent removes the photoresist masking step entirely from the process. Instead of using photoresist to define doped regions, the invention uses the physical structure of the trench gate itself and selective ion implantation timing to achieve the desired doping patterns, extracting the harmful photoresist material from the process flow.
Solution Approach 2:
The patent performs certain doping operations before the trench gate structure is fully formed. By conducting ion implantation at strategic intermediate stages when the trench is not yet complete, the process eliminates the need for photoresist masks that would otherwise be trapped in the narrow trench spaces.
2Ease of manufacture
If photoresist is applied to the substrate surface for ion implantation masking, then region-selective doping is possible, but the photoresist removal process becomes complex and time-consuming
Solution Approach 1:
The invention extracts the photoresist removal step from the manufacturing process by eliminating photoresist usage entirely. The process replaces photoresist-based masking with alternative methods that do not require subsequent removal operations, significantly simplifying the overall manufacturing flow.
3Productivity
If narrow trench width is used to increase channel density, then device performance improves, but access for photoresist removal becomes difficult
Solution Approach 1:
The patent removes the problematic photoresist material from the narrow trench environment entirely by redesigning the process flow. This eliminates the accessibility problem while maintaining the narrow trench dimensions needed for high channel density and device performance.
Solution Approach 2:
The invention performs doping operations at intermediate stages before the trench structure is fully formed, when access is still possible. This preliminary action approach achieves the required doping patterns without requiring subsequent photoresist removal from the completed narrow trenches.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of trench gate IGBTs with improved yield and reduced contamination by eliminating the need for photoresist removal from the trench, simplifying the process and reducing defects, and lowering overall process costs.
Implementation Method 1
a gate electrode division method in which a polysilicon film that is uniformly formed in the trench is etched back by anisotropic etching
Implementation Method 2
a step of introducing second-conductivity-type impurities into the entire surface of the semiconductor substrate to form a channel forming region of a second conductivity type
Data Source
AI summary
A method for manufacturing a semiconductor device includes steps of forming a trench in a surface of a semiconductor substrate of a first conductivity type in a depth direction; forming a conductive layer in the trench, with a first insulating film interposed therebetween; dividing the conductive layer into a gate electrode and an in-trench wiring layer which face each other in the trench and filling a gap between the gate electrode and the in-trench wiring layer with a second insulating film; introducing second-conductivity-type impurities into the entire surface of the semiconductor substrate to form a channel forming region of a second conductivity type; and selectively forming a main electrode region of the first conductivity type in a portion of the channel forming region which is provided along an opening portion of the trench so as to come into contact with the opening portion.