Trench Gate IGBT With Control Gate for Switching Loss Reduction

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Solution Overview

Problem

Insulated gate bipolar transistors (IGBTs) face challenges in reducing on-resistance and switching loss, particularly due to delayed carrier discharge during turn-off, which increases turn-off time and switching loss.

Innovation Solution

The implementation of a semiconductor device with a trench gate structure that includes a main gate electrode and a control gate electrode, where the second gate voltage is applied before changing the first gate voltage from turn-on to turn-off, forming a p-type inversion layer in the drift region to reduce carrier concentration and enhance hole extraction, thereby reducing on-resistance and switching loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If carrier concentration of the n-type drift region is increased to reduce on-resistance, then on-resistance is reduced, but turn-off time increases and switching loss increases due to delayed carrier discharge

Engineering Contradiction:
Improveon-resistanceVSAvoidturn-off time
Core Design Contradiction:
Loss of energyVSLoss of time

Solution Approach 1:

The gate electrode is divided into two separate gate electrodes (first gate electrode and second gate electrode) that can be controlled independently. This segmentation allows different gate voltages to be applied to different regions of the drift region, enabling selective carrier extraction while maintaining low on-resistance in the conducting state

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The second gate voltage is applied before changing the first gate voltage from turn-on to turn-off. This preliminary action begins extracting carriers from the drift region before the main turn-off occurs, reducing the total turn-off time and switching loss while maintaining the benefit of high carrier concentration during conduction

Inventive Principle:
Principle #10Preliminary action

2Loss of energy

If double gate driving is implemented to reduce switching loss, then switching loss is reduced, but device complexity increases

Engineering Contradiction:
Improveswitching lossVSAvoidgate driving system
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The two gate electrodes are integrated into a single trench structure and share common insulating films and semiconductor layer interfaces. This merging approach reduces fabrication complexity compared to completely separate gate structures, while still enabling independent voltage control to reduce switching losses

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration reduces the on-resistance and switching loss of IGBTs, increases design flexibility, and improves reliability by enhancing hole extraction and reducing current concentration at the end portions of the cell region.

Implementation Method 1

forming a p-type inversion layer in the drift region to reduce carrier concentration and enhance hole extraction

Methodology Applied
Scientific EffectInversion layer formation:

Implementation Method 2

Holes are injected into the n-type drift region from the collector region at the same time when electrons are injected into the n-type drift region from the n-type emitter region. Thus, currents using the electrons and holes as carriers flows between the collector electrode and the emitter electrode.

Methodology Applied
Scientific EffectElectron-hole carrier transport:

Data Source

PatentUS11715776B2Semiconductor device and semiconductor circuit
Publication Date: 2023.08.01 KK TOSHIBA
  • US11715776B2 patent drawing
  • US11715776B2 patent drawing
  • US11715776B2 patent drawing

AI summary

According to an embodiment a semiconductor device includes a semiconductor layer including first trenches and second trenches, a first gate electrode in the first trench, a second gate electrode in the second trench, a first gate electrode pad, a second gate electrode pad, a first wiring connecting the first gate electrode pad and the first gate electrode, and a second wiring connecting the second gate electrode pad and the second gate electrode. The semiconductor layer includes a first connection trench. Two first trenches adjacent to each other are connected to each other at end portions by the first connection trench. At least one of the second trenches is provided between the two first trenches. The second gate electrode in the at least one second trench is electrically connected to the second wiring between the two first trenches.