Trench-Gate Semiconductor Layout for Flat Source Metal Bonding
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Solution Overview
Problem
Semiconductor devices with trench-gate structures face challenges in achieving surface metal layer flatness without compromising device performance, leading to issues with wire bonding reliability and potential device destruction during assembly.
Innovation Solution
The semiconductor device incorporates a gate trench with a buried trench portion and a channel contact region positioned higher than the bottom of a second trench, along with a surface metal layer connected to the source and channel contact regions, to improve surface flatness and reduce electric field concentration, while maintaining device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a trench-gate structure is used to improve device performance, then switching speed and power handling capability are improved, but surface metal layer flatness deteriorates causing adhesion problems during wire bonding
Solution Approach 1:
The invention divides the semiconductor device structure into distinct segments: the trench-gate region for high-speed switching and the surrounding flat surface region for wire bonding. By spatially separating the trench structure from the surface metal layer formation area, the device achieves both high switching speed through the trench-gate and good surface flatness for reliable wire bonding adhesion.
Solution Approach 2:
The invention applies different structural qualities to different regions: the gate trench area has vertical structures for electrical performance, while the surface region maintains horizontal flatness for mechanical bonding. This local differentiation allows the trench-gate to provide high-speed switching where needed while the surface provides flatness for wire bonding in other areas.
2Reliability
If a trench-gate structure is used to increase power handling capability, then device reliability is improved, but electric field concentration at the gate trench bottom increases causing potential breakdown
Solution Approach 1:
The invention introduces an intermediary structure (such as a field plate or extended gate structure) that mediates the electric field distribution. This intermediary element redistributes the electric field lines, reducing concentration at the sharp trench bottom while maintaining the high-voltage blocking capability that provides device reliability.
Solution Approach 2:
The invention extends the gate structure into additional spatial dimensions (such as extending laterally beyond the trench walls or creating a three-dimensional field distribution). This dimensional extension allows the electric field to distribute over a larger volume, reducing peak field intensity at the trench bottom while maintaining overall voltage blocking performance.
Data Source
AI summary
A semiconductor device of the present invention includes a gate electrode buried in a gate trench of a first conductivity-type semiconductor layer, a first conductivity-type source region, a second conductivity-type channel region, and a first conductivity-type drain region formed in the semiconductor layer, a second trench selectively formed in a source portion defined in a manner containing the source region in the surface of the semiconductor layer, a trench buried portion buried in the second trench, a second conductivity-type channel contact region selectively disposed at a position higher than that of a bottom portion of the second trench in the source portion, and electrically connected with the channel region, and a surface metal layer disposed on the source portion, and electrically connected to the source region and the channel contact region.