Trench-Gate Power MISFET Outer Region Breakdown Resistance
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Solution Overview
Problem
Existing semiconductor devices with power MISFETs face challenges in reducing capacitance and manufacturing cost, particularly in the outer circumferential region, where breakdown resistance and impurity leakage are concerns, and the number of photomasks used in photolithographic steps is high.
Innovation Solution
A semiconductor device with a breakdown-resistant structure in the outer circumferential region, featuring a conductive polysilicon film pattern isolated from the gate electrode terminal, which prevents impurity leakage and reduces the number of photomasks needed, thereby improving device characteristics and manufacturing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the conductive film area is reduced to lower capacitance, then gate-drain capacitance decreases, but breakdown resistance in the outer circumferential region deteriorates
Solution Approach 1:
The conductive film is segmented into two distinct patterns: a first pattern in the active region that is electrically coupled to the gate electrode terminal, and a second pattern in the outer circumferential region that is electrically isolated from the gate electrode terminal. This segmentation allows the conductive film to serve different functions in different regions, reducing capacitance in the active region while maintaining breakdown resistance in the outer circumferential region.
Solution Approach 2:
Different electrical properties are assigned to different regions: the first pattern in the active region has conductive properties (electrically coupled to gate terminal) to reduce capacitance, while the second pattern in the outer circumferential region has insulating properties (electrically isolated from gate terminal) to maintain breakdown resistance. This local differentiation resolves the contradiction between capacitance reduction and breakdown resistance maintenance.
2Manufacturing precision
If multiple photomasks are used to form precise patterns, then manufacturing precision improves, but manufacturing cost and process complexity increase
Solution Approach 1:
The formation of the first pattern and second pattern of the conductive film is merged into a single photolithographic step using one photomask. The photomask is designed with regions corresponding to both patterns, allowing simultaneous formation of both conductive film patterns in one exposure and development process, thereby reducing manufacturing cost and process complexity while maintaining precise pattern formation.
Data Source
AI summary
The characteristics of a semiconductor device including a trench-gate power MISFET are improved. The semiconductor device includes a substrate having an active region where the power MISFET is provided and an outer circumferential region which is located circumferentially outside the active region and where a breakdown resistant structure is provided, a pattern formed of a conductive film provided over the substrate in the outer circumferential region with an insulating film interposed therebetween, another pattern isolated from the pattern, and a gate electrode terminal electrically coupled to the gate electrodes of the power MISFET and provided in a layer over the conductive film. The conductive film of the pattern is electrically coupled to the gate electrode terminal, while the conductive film of another pattern is electrically decoupled from the gate electrode terminal.