Trench Gate MOSFET Structure for Lower Capacitance and On-Resistance

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Solution Overview

Problem

MOSFETs with trench gate structures face challenges in achieving low gate capacitance and low on-resistance, which are crucial for reducing power consumption.

Innovation Solution

The semiconductor device incorporates a specific configuration with a trench gate structure, including a gate electrode, field plate electrode, and insulating regions, which reduces gate capacitance and on-resistance by optimizing the semiconductor layer and electrode arrangements, and manufacturing methods such as epitaxial growth, dry etching, and thermal oxidation to form the necessary regions and electrodes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a trench gate structure is used, then gate control capability is improved, but gate capacitance increases

Engineering Contradiction:
Improvegate control capabilityVSAvoidgate capacitance
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The gate structure is segmented into a trench gate portion and a field plate portion, with the field plate extending from the trench gate along the sidewall. This segmentation allows the gate to control the channel effectively while reducing the overlapping area between gate and channel, thereby reducing gate capacitance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The field plate extends in a direction along the sidewall of the trench gate, utilizing the vertical dimension to provide gate control. This dimensional extension allows the gate to control the channel without increasing the planar overlap area, thus reducing gate capacitance while maintaining control capability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If a trench gate structure is used, then gate control capability is improved, but on-resistance increases

Engineering Contradiction:
Improvegate control capabilityVSAvoidon-resistance
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The semiconductor layer has different doping concentrations in different regions: a first doping concentration in the channel region and a second doping concentration in the drift region. This local quality variation allows the channel to have low resistance for current conduction while the drift region provides high voltage blocking capability, thus reducing on-resistance while maintaining gate control.

Inventive Principle:
Principle #3Local quality

3Loss of energy

If semiconductor regions are added to reduce on-resistance, then on-resistance decreases, but device complexity increases

Engineering Contradiction:
Improveon-resistanceVSAvoiddevice complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The source and drain regions are merged with the drift region to form a continuous semiconductor structure with varying doping concentrations. This merging reduces the number of discrete components and simplifies the device structure while maintaining low on-resistance through the optimized doping profile.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively decreases gate capacitance and on-resistance, enhancing the semiconductor device's performance by improving withstand voltage and reducing power consumption.

Implementation Method 1

manufacturing methods such as epitaxial growth, dry etching, and thermal oxidation to form the necessary regions and electrodes

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Implementation Method 2

manufacturing methods such as epitaxial growth, dry etching, and thermal oxidation to form the necessary regions and electrodes

Methodology Applied
Scientific EffectThermal oxidation: Oxidation

Data Source

PatentUS12176418B2Semiconductor device that includes at least four semiconductor regions
Publication Date: 2024.12.24 KK TOSHIBA
  • US12176418B2 patent drawing
  • US12176418B2 patent drawing
  • US12176418B2 patent drawing

AI summary

A semiconductor device includes a first electrode, a second electrode, a first semiconductor region of a first conductivity type including a first portion and a second portion, a second semiconductor layer of a second conductivity type, a third semiconductor region of the first conductivity type, a fourth semiconductor region of the second conductivity type, a gate electrode located between the second semiconductor region and the fourth semiconductor region and between the third semiconductor region and the fourth semiconductor region in a second direction, a first insulating region, a third electrode, and a second insulating region.