Trench Gate Power MOSFET ESD Resistance

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Solution Overview

Problem

Power MOSFETs in high breakdown voltage applications face challenges in achieving low voltage drive, low on-resistance, and high resistance against electrostatic discharge, particularly due to limitations in trench gate structures that affect ESD resistance and on-resistance.

Innovation Solution

The semiconductor device incorporates a trench gate structure with a gate electrode lead portion under the gate wiring, extending trenches under both the element region and the gate wiring, and using a gate insulating film to increase the gate capacitance of the gate wiring, thereby enhancing ESD resistance without increasing on-resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a trench gate structure is used to achieve low voltage drive and low on-resistance, then the power MOSFET performance is improved, but the resistance against electrostatic discharge (ESD) deteriorates

Engineering Contradiction:
Improvepower MOSFET performanceVSAvoidESD resistance
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent extends the trench structure horizontally under the gate wiring in addition to the vertical trench gate structure. This dimensional extension creates additional gate electrode surface area and increases gate capacitance, which enhances ESD resistance without increasing the vertical on-resistance of the main current path.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The extended trench structure serves multiple functions: it maintains the low on-resistance function of the vertical trench gate while simultaneously providing enhanced ESD protection. The gate electrode lead portion under the gate wiring acts as both a structural extension and an ESD protection element, making the structure multi-functional.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Object-affected harmful factors

If the gate capacitance is increased to improve ESD resistance, then the ESD resistance is improved, but the device complexity increases

Engineering Contradiction:
ImproveESD resistanceVSAvoidtrench structure complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent merges the ESD protection function with the existing gate structure by extending the trench and gate electrode to form a gate electrode lead portion. This integration avoids adding separate ESD protection structures and combines multiple functions into a single unified structure, thereby reducing overall device complexity while achieving enhanced ESD resistance.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively improves ESD resistance by increasing the gate capacitance of the gate wiring while maintaining low on-resistance, as demonstrated by the mesh and stripe pattern evaluations showing higher ESD resistance with higher overlapping rates.

Implementation Method 1

using a gate insulating film to increase the gate capacitance of the gate wiring, thereby enhancing ESD resistance

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS8008715B2Semiconductor device
Publication Date: 2011.08.30 KK TOSHIBA
  • US8008715B2 patent drawing
  • US8008715B2 patent drawing
  • US8008715B2 patent drawing

AI summary

There is provided a semiconductor device comprising: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type provided on the first semiconductor layer of the first conductivity type; a semiconductor region of the first conductivity type selectively provided on a front surface portion of the second semiconductor layer of the second conductivity type; a first main electrode provided in contact with a surface of the semiconductor region; a second main electrode provided on a side of the first semiconductor layer of the first conductivity type, the side being opposite to the surface on which the second semiconductor layer of the second conductivity type is provided; a gate wiring provided on the second semiconductor layer of the second conductivity type around an element region in which the semiconductor region is provided; a trench penetrating the second semiconductor layer of the second conductivity type to reach the first semiconductor layer of the first conductivity type, and also extending under the element region and the gate wiring; a gate electrode provided inside the trench in the element region with a gate insulating film interposed in between; and a gate electrode lead portion provided inside the trench under the gate wiring with the gate insulating film interposed in between, and contacting the gate wiring and the gate electrode.