Trench Gate MOSFET Shielded Electrode Design
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Solution Overview
Problem
Conventional trench MOSFET designs fail to effectively reduce both gate-to-drain capacitance Cgd and gate-to-source capacitance Cgs, leading to increased switching loss and limited device performance in power switch devices.
Innovation Solution
The design incorporates a trench gate MOSFET structure with a shielded gate electrode and an insulating layer between the gate and shielded gate electrodes, along with a dielectric layer to reduce coupling effects, and a specific trench geometry to minimize capacitance, thereby lowering switching loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional trench MOSFET structure is used to enhance device density, then vertical structure is achieved, but switching loss increases due to high input capacitance
Solution Approach 1:
The patent changes the electrical parameters of the gate structure by introducing multiple conductive layers with different potentials and insulating layers between them. This modifies the capacitance characteristics (reducing input capacitance) while preserving the vertical trench structure that enables high device density, thereby reducing switching loss without sacrificing productivity.
Data Source
AI summary
A trench gate MOSFET is provided. An epitaxial layer is disposed on a substrate. A body layer is disposed in the epitaxial layer. The epitaxial layer has a first trench therein, the body layer has a second trench therein, and the first trench is disposed below the second trench. A first insulating layer is disposed on a surface of the first trench. A second insulating layer is disposed in the first trench. A first conductive layer is disposed between the first and second insulating layers. A second conductive layer is disposed in the second trench. A third insulating layer is disposed between the second conductive layer and the body layer and between the second conductive layer and the first conductive layer. A dielectric layer is disposed on the epitaxial layer and covers the second conductive layer. Two doped regions are disposed in the body layer respectively beside the second trench.