Trench Gate Device EMI Shielding via Nested Polysilicon

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Solution Overview

Problem

Trench gate devices with super junction structures are susceptible to electromagnetic interference, which affects their performance.

Innovation Solution

A trench gate device is designed with a sandwich structure comprising a polysilicon gate, an intermediate dielectric layer, and an auxiliary polysilicon layer, which reduces the impact of electromagnetic interference by fully filling the trench and forming a source region on the substrate with a well region.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a trench gate structure is used to achieve faster switching speed and lower switching loss, then switching performance is improved, but susceptibility to electromagnetic interference increases

Engineering Contradiction:
Improveswitching speedVSAvoidelectromagnetic interference susceptibility
Core Design Contradiction:
SpeedVSObject-affected harmful factors

Solution Approach 1:

The patent implements a nested structure where the polysilicon gate is surrounded by an intermediate dielectric layer, which is in turn surrounded by an auxiliary polysilicon layer. This nested configuration creates multiple shielding layers within the trench gate structure, effectively reducing electromagnetic interference while preserving the fast switching characteristics of the trench gate design.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The patent employs a composite structure combining different materials with complementary properties: polysilicon for gate functionality, intermediate dielectric layer for insulation and electromagnetic shielding, and auxiliary polysilicon layer for additional shielding and field control. This composite approach addresses both switching performance and electromagnetic interference resistance.

Inventive Principle:
Principle #40Composite materials

2Productivity

If the device cell size is reduced to increase integration, then device integration is improved, but electromagnetic interference susceptibility increases

Engineering Contradiction:
Improvedevice integrationVSAvoidelectromagnetic interference susceptibility
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The nested configuration of polysilicon gate, intermediate dielectric layer, and auxiliary polysilicon layer creates an compact electromagnetic shielding structure that can be integrated into small device cells. The nested design maximizes shielding effectiveness within minimal space, enabling high integration while maintaining EMI resistance.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Object-affected harmful factors

If an intermediate dielectric layer and auxiliary polysilicon layer are added to reduce electromagnetic interference, then electromagnetic interference resistance is improved, but device complexity increases

Engineering Contradiction:
Improveelectromagnetic interference resistanceVSAvoidtrench gate structure complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent segments the trench gate structure into distinct functional layers: the polysilicon gate for control, the intermediate dielectric layer for shielding and insulation, and the auxiliary polysilicon layer for additional shielding. This segmentation allows each layer to be optimized independently while maintaining overall simplicity through systematic integration.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The auxiliary polysilicon layer serves multiple functions: electromagnetic shielding, field control, and structural completion of the trench fill. This multi-functionality reduces the need for additional separate components, thereby limiting the increase in device complexity while achieving improved EMI resistance.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11527633B2Trench gate device and method for making the same
Publication Date: 2022.12.13 SHANGHAI HUAHONG GRACE SEMICON MFG CORP
  • US11527633B2 patent drawing
  • US11527633B2 patent drawing
  • US11527633B2 patent drawing

AI summary

A method for manufacturing a trench gate device includes: forming a trench in a substrate with a super junction structure; forming a gate dielectric layer in the trench; forming a polysilicon gate by filling a portion of the trench with polysilicon; forming an intermediate dielectric layer in the trench; forming an auxiliary polysilicon layer by filling a gap in the trench with polysilicon; forming a source region of the trench gate device in the substrate; depositing an interlayer dielectric layer, and forming contacts in the interlayer dielectric layer, wherein the polysilicon gate, the auxiliary polysilicon layer, and the source region are led out from the contacts; and connecting the led-out auxiliary polysilicon layer to the led-out source region.