Trench Gate Fabrication with Recessed SiN for Clean Dielectric Growth
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Solution Overview
Problem
The existing process for manufacturing semiconductor electronic devices with trench gates faces challenges in achieving a clean silicon surface for gate dielectric growth due to the presence of the second layer of silicon nitride, which results in an undesired negatively tapered profile.
Innovation Solution
The method involves forming a multilayer structure on the semiconductor body, selectively removing regions for trench formation, and performing a series of etching and oxidation steps to create a trench gate structure. A key innovation is the partial etching of the second layer of silicon nitride to achieve a lateral recession, ensuring a clean surface for gate dielectric growth without forming a negatively tapered profile.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the second layer of silicon nitride is completely removed during etching, then the silicon surface becomes clean for gate dielectric growth, but an undesired negatively tapered profile is formed
Solution Approach 1:
The patent applies preliminary action by performing a first etching step that partially removes the silicon nitride layer before complete removal. This preliminary partial etching prepares the surface for subsequent gate dielectric growth while avoiding the formation of the negatively tapered profile that would occur if complete removal were attempted directly. The staged approach allows the surface to be cleaned progressively without creating harmful geometric distortions.
2Manufacturing precision
If the second layer of silicon nitride is partially etched to achieve lateral recession, then a clean surface is obtained without negatively tapered profile, but additional etching steps are required
Solution Approach 1:
The patent applies segmentation by dividing the silicon nitride removal process into distinct stages: a first etching step that performs partial removal to achieve lateral recession and clean the surface, and a second etching step that completes the removal. This segmented approach to etching allows each step to be optimized for its specific purpose, achieving surface cleanliness without creating the negatively tapered profile, while the additional step complexity is justified by the elimination of profile defects.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the formation of a trench gate structure with a uniform gate dielectric layer, improving the electrical performance and reducing wafer stresses, while maintaining cost-effectiveness and process integration.
Implementation Method 1
a thermal oxidation process is then carried out, to form a sacrificial oxide layer 14 within the trench 6, on the lateral and bottom walls 6a, 6b. The formation of the sacrificial oxide layer 14 involves partial conversion of the silicon of semiconductor body into silicon oxide.
Implementation Method 2
Then, Figure 12, the sacrificial oxide layer 114 within the trench 106 and the third layer 104c are completely removed at the same time, in one single etching step.
Implementation Method 3
Then, Figure 13, a step is carried out to form the gate dielectric layer 120 within the trench 106, for example by thermal oxidation or CVD deposition.
Implementation Method 4
Then, Figure 13, a step is carried out to form the gate dielectric layer 120 within the trench 106, for example by thermal oxidation or CVD deposition.
Data Source
Figure 1~2
Figure 3~4
Figure 5A~5B
AI summary
A method of manufacturing an electronic device, comprising the steps of: forming, on a first side (102a) of a solid body (101, 102) of Silicon, a first covering layer (104a) of SiO2; forming, on the first covering layer (104a), a second covering layer (104b) of SiN; forming, on the second covering layer (104b), a third covering layer (104c) of TEOS; forming a passing opening through the first, second and third covering layers (104a-104c); forming a trench (106) at the portion of the solid body exposed through the opening; grow a sacrificial layer (114), of said first oxide, within the trench (106); and perform in the order: selectively etch part of the second covering layer (104b), completely remove the sacrificial layer (114) and the third covering layer (104c) in one or more contextual etching steps.