Trench Semiconductor Gate Structure Segmentation
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Solution Overview
Problem
Current trench-type semiconductor devices face challenges in reducing input capacitance and reverse transfer capacitance while increasing output capacitance to enhance gate capacitance characteristics and response speed.
Innovation Solution
A method of manufacturing a trench type semiconductor device involves forming an epitaxial layer, creating a trench with a gate structure that includes an upper gate, a lower gate, and an intermediate insulating portion, and utilizing specific layers and etching processes to reduce input capacitance and increase output capacitance, thereby improving gate capacitance characteristics and response speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional trench-type gate power transistor structure is used, then the device can achieve low on-state resistance, but the input capacitance and reverse transfer capacitance cannot be effectively reduced
Solution Approach 1:
The gate structure is divided into an upper gate and a lower gate separated by an intermediate insulating portion. This segmentation allows independent control of different capacitance components, enabling reduction of input capacitance and reverse transfer capacitance while maintaining the low on-state resistance characteristic of conventional trench-type devices.
Solution Approach 2:
Different regions of the gate structure are assigned different functions: the upper gate controls input capacitance, the intermediate insulating portion controls reverse transfer capacitance, and the lower gate controls output capacitance. This local differentiation optimizes each region's contribution to overall device performance.
2Ease of manufacture
If the gate structure is simplified, then the manufacturing process is easier, but the gate capacitance characteristics and response speed cannot be improved
Solution Approach 1:
The segmented gate structure with upper and lower gates separated by an intermediate insulating portion is formed using standard semiconductor fabrication processes including selective epitaxial growth, plasma etching, and chemical vapor deposition. These are conventional techniques that maintain manufacturing ease while achieving improved gate capacitance characteristics and faster response speed.
3Quantity of substance
If the upper gate volume is reduced, then the input capacitance and reverse transfer capacitance are reduced, but the manufacturing precision requirements increase
Solution Approach 1:
The intermediate insulating portion is formed beforehand using selective epitaxial growth before the upper gate is deposited. This preliminary action defines the precise location and dimensions of the upper gate region, reducing the precision requirements for subsequent upper gate formation steps and enabling effective capacitance reduction.
Solution Approach 2:
The intermediate insulating portion acts as an intermediary structure that precisely defines the boundary between the upper and lower gates. This intermediary layer simplifies the positioning and dimensional control of the upper gate, reducing manufacturing precision requirements while achieving the desired capacitance reduction.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively increases drain-source breakdown voltage, reduces input and reverse transfer capacitance, and increases output capacitance, leading to improved gate capacitance characteristics and faster response speed.
Implementation Method 1
a step of oxidizing a surface of the first polysilicon layer to form a second oxide layer
Implementation Method 2
a step of depositing a first oxide layer in the trench
Implementation Method 3
an epitaxial layer is formed on a substrate
Implementation Method 4
a trench is formed in the epitaxial layer
Implementation Method 5
a step of implanting ions into the epitaxial layer and driving in the ions by heating
Data Source
AI summary
A method of manufacturing a trench type semiconductor device includes the following steps. First, an epitaxial layer is formed on a substrate, then a trench is formed in the epitaxial layer, and a gate structure is formed in the trench. The gate structure includes an upper gate and a lower gate, and an intermediate insulating portion, and the intermediate insulating portion is located in the upper gate.