Trench Gate Semiconductor Device Self-Aligned Contact Formation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor device fabrication processes face challenges in efficiently forming self-aligned gate and source contacts within trench structures, leading to complex masking, doping, and etching processes that complicate integration density and topography.
Innovation Solution
A semiconductor device design featuring a trench with a buried insulated source electrode and gate electrodes, where a spacer is selectively removed to expose the gate electrodes for deposition of conductive material, forming self-aligned contacts that are electrically and physically connected, and the omission of gate polysilicon islands simplifies the process and enhances integration density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional masking, doping and etching processes are used to form contacts in trench structures, then electrical connectivity is achieved, but process complexity and integration density are compromised
Solution Approach 1:
The spacer is formed in advance during the trench formation process, defining the future contact location before any contact fabrication steps begin. This preliminary positioning eliminates the need for separate masking and alignment steps that would otherwise be required to define contact locations, thereby reducing process complexity while ensuring proper electrical connectivity
Solution Approach 2:
The spacer material is selectively removed from the trench structure to expose the gate electrode, creating a self-aligned contact opening. This extraction approach eliminates the need for complex masking patterns and multiple etching steps, simplifying the overall process while maintaining precise alignment for electrical connectivity
2Reliability
If gate polysilicon islands are used in trench structures, then gate electrode formation is achieved, but integration density and topography uniformity are reduced
Solution Approach 1:
The gate electrode is formed as a continuous structure in the upper portion of the trench without discrete polysilicon islands, creating a uniform local structure throughout the gate region. This continuous configuration improves integration density and topography uniformity compared to island-based approaches, while still providing the necessary gate control function
Solution Approach 2:
The gate electrode structure is merged into a single continuous element rather than being divided into separate polysilicon islands. This merging approach simplifies the overall device structure, improves planarity and integration density, while maintaining effective gate control over the channel region
Data Source
AI summary
A semiconductor device includes a semiconductor substrate, a trench, a buried insulated source electrode arranged in a bottom portion of the trench, a first gate electrode and a second gate electrode arranged in an upper portion of the trench and spaced apart from one another. A surface gate contact extends into the upper portion of the trench and is in physical and electrical contact with the first gate electrode and second gate electrode.