Trench Gate Semiconductor Device Barrier Region Optimization
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Solution Overview
Problem
Semiconductor devices face a challenge in achieving a balance between low on-resistance and high breakdown voltage, particularly in trench gate structures where the lateral gate spacing is narrowed, affecting the device's performance and switching rate.
Innovation Solution
The semiconductor device incorporates a trench gate structure with a barrier region of higher impurity concentration between the drift and base regions, along with an embedded electrode in electrical continuity with the source electrode, which helps in reducing on-resistance and maintaining high breakdown voltage by controlling the electric field and gate-collector capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the lateral gate spacing is narrowed in the trench gate structure, then the device size is reduced and effective channel width is widened, but the breakdown voltage decreases
Solution Approach 1:
The patent applies local quality by creating a barrier region with higher impurity concentration specifically at the junction between the drift region and base region. This localized modification of impurity concentration in a specific area allows the device to maintain high breakdown voltage at the critical junction point while keeping the overall device size reduced through narrow lateral gate spacing.
Solution Approach 2:
The patent changes the impurity concentration parameter by forming a barrier region with higher impurity concentration than the drift region. This parameter change in the barrier region enables the device to achieve both low on-resistance and high breakdown voltage by controlling the electric field distribution through impurity concentration modulation.
2Ease of operation
If the gate electrode length is extended to improve controllability, then the gate-collector capacitance increases, but the switching rate decreases
Solution Approach 1:
The patent changes the physical parameter of gate electrode length to an optimal value that balances controllability and switching rate. By carefully controlling the gate electrode length to extend from the drift region to a specific position relative to the base region, the patent achieves improved controllability without excessive gate-collector capacitance that would slow switching.
Data Source
AI summary
According to one embodiment, a semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of the first conductivity type, a third semiconductor region of a second conductivity type, a fourth semiconductor region of the first conductivity type, a fifth semiconductor region of the second conductivity type, a first electrode, a second electrode, and a third electrode. The first electrode is provided together with the first region in a first direction, provided together with the third region in a second direction, and has an end portion of the first region side located nearer to the first semiconductor side than a boundary between the second region and the third region. The second electrode is provided between the first electrode and the first region and is in electrical continuity with the fourth region. The third electrode contacts with the fourth region.