Trench Gate Semiconductor Device Potential Crowding Suppression

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Solution Overview

Problem

In semiconductor manufacturing, forming a p-type semiconductor region by ion implantation can introduce defects in gallium nitride-based semiconductors, which are difficult to recover with heat treatment, making it challenging to suppress potential crowding at the trench bottom face without ion implantation of a p-type impurity.

Innovation Solution

A method involving stacking a p-type semiconductor layer on an n-type semiconductor layer, followed by ion-implanting an n-type impurity, performing heat treatment to activate it, and forming a trench that reaches the n-type semiconductor layer, with a p-type impurity diffusion region formed in the n-type semiconductor layer to suppress potential crowding at the trench bottom face without using p-type impurity ion implantation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If ion implantation of p-type impurity is performed to suppress potential crowding, then the breakdown voltage is improved, but crystal defects are introduced in gallium nitride-based semiconductors

Engineering Contradiction:
Improvebreakdown voltageVSAvoidcrystal quality
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

Instead of implanting p-type impurity directly into the semiconductor layer to suppress potential crowding, the invention inverts the approach by forming a p-type impurity diffusion region in the substrate. This inverted structure achieves the same electrical effect (suppressing potential crowding at the trench bottom) without introducing crystal defects, as the p-type region is formed in the substrate rather than in the fragile gallium nitride layer through ion implantation.

Inventive Principle:
Principle #13The other way round (Inversion)

2Strength

If p-type impurity is ion-implanted into the semiconductor layer, then the potential crowding is suppressed, but the crystal defects cannot be recovered by heat treatment

Engineering Contradiction:
Improvepotential crowding suppressionVSAvoidprocess recoverability
Core Design Contradiction:
StrengthVSEase of manufacture

Solution Approach 1:

The invention extracts the p-type impurity formation process from the semiconductor layer and relocates it to the substrate. By forming the p-type impurity diffusion region in the substrate rather than in the gallium nitride semiconductor layer, the harmful crystal defects are avoided entirely, and the process becomes recoverable since no damage is inflicted on the semiconductor crystal structure.

Inventive Principle:
Principle #2Taking out (Extraction)

3Productivity

If conventional ion implantation method is used, then the p-type semiconductor region is formed, but additional manufacturing steps are required to address crystal defects

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidprocess complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The invention converts the potential harm of ion implantation (crystal defects) into a benefit by performing the implantation in the substrate rather than in the semiconductor layer. The substrate, being more robust, can withstand the ion implantation process without suffering from irrecoverable crystal defects. This approach eliminates the need for additional defect-repair steps while maintaining the electrical performance benefits of p-type regions.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method effectively suppresses potential crowding at the trench bottom face, improving the breakdown voltage of the semiconductor device by forming p-type impurity diffusion regions in the n-type semiconductor layer through heat treatment after ion implantation, without the need for p-type impurity ion implantation.

Implementation Method 1

a p-type impurity diffusion region in which the p-type impurity contained in the p-type semiconductor layer is diffused is formed in at least part of the n-type semiconductor layer

Methodology Applied
Scientific EffectDiffusion: Diffusion

Implementation Method 2

forming an n-type semiconductor region in at least part of the p-type semiconductor layer by ion-implanting an n-type impurity into the p-type semiconductor layer

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 3

performing heat treatment to activate the ion-implanted n-type impurity

Methodology Applied
Scientific EffectHeat treatment: Heat Treatment

Data Source

PatentUS10153356B2Method of manufacturing semiconductor device, and semiconductor device
Publication Date: 2018.12.11 TOYODA GOSEI CO LTD
  • US10153356B2 patent drawing
  • US10153356B2 patent drawing
  • US10153356B2 patent drawing

AI summary

A technique of suppressing the potential crowding in the vicinity of the outer periphery of a bottom face of a trench without ion implantation of a p-type impurity is provided. A method of manufacturing a semiconductor device having a trench gate structure comprises an n-type semiconductor region forming process. In the n-type semiconductor region forming process, a p-type impurity diffusion region in which a p-type impurity contained in a p-type semiconductor layer is diffused is formed in at least part of an n-type semiconductor layer that is located below an n-type semiconductor region.