Trench Gate Semiconductor Device for Load Short-Circuit Tolerance
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Solution Overview
Problem
Semiconductor devices with IGBTs face challenges in reducing ON voltage while maintaining load short-circuit tolerance, as existing technologies struggle to balance low ON voltage with improved current handling and thermal management.
Innovation Solution
The semiconductor device design incorporates trench gates with varying distances between bottom and communication portions, thicker gate insulation at the bottom portion, and a divided emitter layer structure, which limits hole transfer and reduces saturation current, thereby achieving lower ON voltage and enhanced load short-circuit tolerance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the distance between adjacent gate electrodes is reduced to lower ON voltage, then the ON voltage decreases, but the load short-circuit tolerance deteriorates due to increased saturation current
Solution Approach 1:
The gate insulation layer is designed with non-uniform thickness, being thicker at the bottom portion of the trench gate and thinner at the communication portion. This local variation in insulation thickness creates different electrical characteristics in different regions of the same structure, allowing the bottom portion to have higher breakdown voltage while the communication portion maintains low resistance for current flow.
Solution Approach 2:
The trench gate structure extends in the depth direction (z-direction) into the drift layer, creating a three-dimensional configuration. By controlling the trench depth and the thickness of the gate insulation layer at different depths, the patent achieves both low ON voltage (through sufficient gate control) and high load short-circuit tolerance (through increased breakdown voltage in the deeper regions).
2Reliability
If the gate insulation layer thickness is increased to improve breakdown voltage, then the load short-circuit tolerance improves, but the ON voltage increases due to reduced electron injection efficiency
Solution Approach 1:
The gate insulation layer thickness is varied locally within the trench structure. The bottom portion has a larger thickness (L2) for high breakdown voltage, while the communication portion has a smaller thickness (L1) for low ON voltage. This local differentiation resolves the contradiction between the two opposing requirements.
Solution Approach 2:
The gate insulation layer is segmented into different thickness regions along the depth direction of the trench. This segmentation allows each region to fulfill its specific function: the thinner upper region for efficient electron injection and the thicker lower region for high voltage withstand capability.
3Power
If the distance between adjacent trench gates is reduced to lower ON voltage, then the ON voltage decreases, but the manufacturing precision becomes more difficult to control
Solution Approach 1:
The patent moves the gate structure into the depth direction by forming trenches that extend vertically into the drift layer. This vertical dimension provides additional space for gate electrode placement, allowing sufficient horizontal spacing between adjacent trenches for manufacturing control while achieving low ON voltage through the vertical gate control mechanism.
Solution Approach 2:
The patent changes the critical parameter from horizontal gate spacing to vertical gate depth and insulation thickness. By controlling the trench depth (D2) and the thickness of the gate insulation layer at different positions (L1 and L2), the patent achieves both low ON voltage and manufacturability without relying solely on reduced horizontal spacing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively reduces ON voltage and improves load short-circuit tolerance by controlling hole transfer and current density, while simplifying manufacturing and reducing thermal issues.
Implementation Method 1
a gate insulation layer formed on walls of the trenches
Implementation Method 2
an N-type inversion layer is formed in the P-type base layer at an interface with the gate insulation layer in the trench, and an electron accumulation layer is formed in the N-type drift layer at an interface with the gate insulation layer in the trench. Electrons flow into the N−-type drift layer from the N+-type emitter layer through the inversion layer and the accumulation layer
Implementation Method 3
The gate insulation is thicker in the bottom portion than in the communication portion
Implementation Method 4
when a load short-circuit occurs, an electric current increases to saturation limited by the device. Then, Joule heat proportional to the salutation current is generated, so that a temperature of the semiconductor device increases
Data Source
AI summary
In a semiconductor device, a trench gate has a bottom portion in a drift layer and a communication portion extending from a surface of a base layer to communicate with the bottom portion. A distance between adjacent bottom portions is smaller than a distance between adjacent communication portions in a x-direction. A region between adjacent trench gates is divided in a y-direction into an effective region as an electron injection source and an ineffective region which does not serve as the electron injection source. An interval L1 (>0) of the ineffective region in the y-direction, a length D1 of the communication portion in the z-direction, and a length D2 of the bottom portion in the z-direction satisfy L1≦2(D1+D2). The z-direction is orthogonal to a x-y plane defined by the x-direction and the y-direction which are orthogonal to each other.