Trench Gate Semiconductor Layout With Sidewall Contact Integration
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Solution Overview
Problem
The miniaturization of semiconductor devices is hindered by the dimensional tolerance of contact electrodes, which restricts the proximity of gate and contact electrodes, limiting the reduction of trench pitch between gate and emitter trenches.
Innovation Solution
A semiconductor device design where the contact electrode passes through the sidewall of the trench and is electrically connected to both the body and impurity regions, with an embedded insulating layer isolating the gate and contact electrodes, allowing for closer spacing without the need for separate formation away from the gate electrode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the contact electrode is formed away from the gate electrode to avoid contact, then the dimensional tolerance of the contact electrode is satisfied, but the trench pitch between gate and emitter trenches cannot be reduced, hindering miniaturization
Solution Approach 1:
The contact electrode is nested within the gate trench structure, passing through the sidewall of the trench rather than being formed separately away from the gate electrode. This allows the contact electrode to be positioned closer to the gate electrode while still maintaining proper electrical connections and avoiding short circuits, thereby reducing the trench pitch between gate and emitter trenches and enabling device miniaturization.
2Length of moving object
If the contact electrode passes through the sidewall of the trench, then the trench pitch is reduced enabling miniaturization, but the complexity of electrode formation increases
Solution Approach 1:
The formation of the contact electrode is merged with the gate trench formation process. The contact electrode is formed to pass through the sidewall of the gate trench in the same processing sequence, combining what would otherwise be separate formation steps. This reduces the overall process complexity while achieving the miniaturization benefit of reduced trench pitch.
Data Source
AI summary
A semiconductor device includes a semiconductor layer with a main surface featuring a trench. A first-conductivity-type body region and a second-conductivity-type impurity region are formed along the trench's sidewall. A gate insulating layer lines the trench's inner wall, and a gate electrode is embedded within the trench, facing both the body and impurity regions. A contact electrode extends through the trench sidewall, connecting electrically to both regions and emerging at the main surface. An embedded insulating layer within the trench separates the gate and contact electrodes, providing insulation.