Trench Gate Semiconductor Structure for Lower Source Contact Resistance

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Solution Overview

Problem

Transistors for power applications face challenges in balancing high blocking voltage and low turn-on resistance due to increased source contact resistance and reliability degradation from self-heating effects, particularly when scaling unit cell area for higher productivity and yield.

Innovation Solution

A semiconductor device with a trench gate structure that includes a conductive layer extending into recesses on the semiconductor layer surface to increase contact area, adjusting electric field distribution, and configuring channel drain regions to enhance uniformity and reduce on-resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If unit cell area is reduced to increase productivity and yield, then manufacturing efficiency is improved, but source contact resistance increases leading to higher turn-on resistance

Engineering Contradiction:
ImproveproductivityVSAvoidsource contact resistance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The conductive layer extends vertically into recesses formed in the semiconductor layer, transforming a two-dimensional contact interface into a three-dimensional structure. This dimensional change increases the contact area between the conductive layer and source region without expanding the horizontal unit cell area, thereby reducing source contact resistance while maintaining high productivity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The conductive layer is nested within the recesses of the semiconductor layer, creating a nested structure where the conductive layer occupies the recess volume. This nesting approach maximizes the contact interface area within the constrained unit cell area, addressing the contradiction between productivity and contact resistance

Inventive Principle:
Principle #7Nested doll (Nesting)

2Productivity

If unit cell area is reduced for higher productivity, then manufacturing efficiency is improved, but self-heating effect increases causing reliability degradation

Engineering Contradiction:
ImproveproductivityVSAvoidself-heating effect
Core Design Contradiction:
ProductivityVSTemperature

Solution Approach 1:

By extending the conductive layer vertically into recesses, the current path is lengthened and distributed over a larger volume. This dimensional change reduces current density and improves heat dissipation, mitigating self-heating effects while maintaining compact unit cell area for high productivity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The recess structure creates localized regions with different thermal and electrical properties. The extended conductive layer in the recesses provides localized heat sinking and current distribution, reducing hot spots and self-heating effects in high-current-density regions

Inventive Principle:
Principle #3Local quality

Data Source

PatentEP4654265A1Semiconductor device
Publication Date: 2025.11.26 CHONGQING INNOEVSIC TECHNOLOGY CO LTD
  • EP4654265A1 patent drawingFigure 1
  • EP4654265A1 patent drawingFigure 2
  • EP4654265A1 patent drawingFigure 3

AI summary

A semiconductor device including a semiconductor layer, a trench gate structure and a conductive layer is provided. The semiconductor layer has a first surface and a second surface. The trench gate structure is at least partially located in a trench on the first surface of the semiconductor layer. The semiconductor layer includes a source region, a body region and a drift region. The source region extends from the first surface toward the second surface, a plurality of recesses are disposed on the first surface, the conductive layer adjoins the first surface and extends into the plurality of recesses. The plurality of recesses are arranged in the first surface of the semiconductor layer, so that the conductive layer extends into the recess when adjoining the first surface, so as to increase a contact area between the conductive layer and the source region per unit area and reduce a source contact resistance.