Trench Gate Semiconductor Layout for Lower dV/dt Switching Noise
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Solution Overview
Problem
Conventional semiconductor devices, such as IGBTs and MOSFETs, face challenges in managing electrostatic capacitance and voltage switching characteristics, leading to increased radiation noise and reduced circuit reliability due to high dV/dt values during switching operations, especially at high frequencies.
Innovation Solution
The semiconductor device incorporates a specific arrangement of first and second trench groups with a preset ratio, including dummy and gate trench portions, to adjust electrostatic capacitance and dV/dt, thereby reducing radiation noise and improving circuit reliability by optimizing the ratio and arrangement of trench groups on the semiconductor substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a repeated structure with dummy trench portions is provided at a certain ratio with respect to gate trench portions, then the electrostatic capacitance is adjusted, but the dV/dt during switching operations increases leading to increased radiation noise
Solution Approach 1:
The patent segments the gate trench portions into multiple groups (first gate trench portions and second gate trench portions) with different configurations. The first gate trench portions have a certain depth and the second gate trench portions have a different depth, creating a segmented structure that allows independent optimization of different regions to control both capacitance and dV/dt characteristics
Solution Approach 2:
The patent applies local quality by providing different trench configurations in different regions of the semiconductor device. The first gate trench portions are positioned in specific regions with one configuration, while the second gate trench portions are positioned in other regions with a different configuration, allowing local optimization of electrostatic capacitance and voltage switching characteristics in different areas
2Reliability
If the ratio of dummy trench portions to gate trench portions is increased, then the electrostatic capacitance is reduced, but the switching frequency capability is limited
Solution Approach 1:
The patent creates a dynamic balance between capacitance reduction and switching frequency capability by using two types of gate trench portions with different depths. The first gate trench portions contribute to capacitance control while the second gate trench portions maintain switching performance, allowing the structure to dynamically optimize both parameters through their combined effect
Solution Approach 2:
The patent changes the physical parameters of the gate trench portions by varying their depths. The first gate trench portions have a first depth while the second gate trench portions have a second depth that is different from the first depth. This parameter variation allows simultaneous optimization of electrostatic capacitance and voltage switching characteristics without requiring a high ratio of dummy trenches
Data Source
AI summary
Provided is a semiconductor device that has a plurality of gate trench portions electrically connected to a gate electrode, and a plurality of dummy trench portions electrically connected to an emitter electrode, and includes a first trench group that includes one gate trench portion and two dummy trench portions adjacent to the gate trench portion and adjacent to each other, and a second trench group that includes two gate trench portions adjacent to each other.