Trench-Gate Transistor Sidewall Insulation for Breakdown Voltage

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Solution Overview

Problem

Conventional trench-gate transistors face issues with gate-source short-circuits and inefficient edge termination, which affect the uniformity of the electrical field profile and reverse breakdown voltage, leading to suboptimal performance.

Innovation Solution

The implementation of a cellular trench-gate transistor structure with a stack of silicon dioxide and silicon nitride layers as the thick trench sidewall insulating layer, where an integral first layer of silicon dioxide extends over the top corners of the trenches, providing a thin gate dielectric and part of the thick insulating layer, and a second layer of silicon dioxide, along with a conductive field plate, to enhance the electrical field profile and prevent short-circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If an oxide-nitride hardmask is used during trench etching, then the trenches can be formed with defined geometry, but the oxide of the hardmask may be undesirably etched, attacking the thin trench sidewall insulating layer near the top corners

Engineering Contradiction:
Improvetrench geometry definitionVSAvoidthin insulating layer integrity
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

A thick insulating layer comprising a stack of materials (oxide-nitride-oxide) is introduced as an intermediary between the hardmask and the thin trench sidewall insulating layer. This thick layer acts as a protective mediator that absorbs the harmful etching attacks from the hardmask oxide, preventing them from reaching and damaging the thin insulating layer during subsequent processing steps.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The thick insulating layer is formed in advance before the potential etching damage can occur. This layer provides a cushioning protective barrier that is already in place to absorb and withstand the etching attacks from the hardmask oxide, thereby protecting the thin insulating layer from damage before the damage can happen.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Ease of manufacture

If the thin trench sidewall insulating layer is exposed to hardmask oxide etching, then the manufacturing process can proceed, but gate-source short-circuits may occur due to damage of the thin insulating layer

Engineering Contradiction:
Improvemanufacturing process continuityVSAvoidgate-source insulation
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The thick insulating layer serves as a sacrificial intermediary that absorbs the harmful etching effects, allowing the manufacturing process to continue without interruption while protecting the critical thin insulating layer from damage that would cause gate-source short-circuits.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The potentially harmful etching action of the hardmask oxide is converted into a beneficial process by directing it against the thick insulating layer instead of the thin layer. The etching that would otherwise be damaging is now safely absorbed by the thicker, sacrificial layer, protecting the device functionality.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Ease of manufacture

If conventional trench-gate transistor structure is used, then the device can be manufactured with standard processes, but the electrical field profile in the drain drift region is non-uniform and reverse breakdown voltage is limited

Engineering Contradiction:
Improvestandard manufacturing processVSAvoidreverse breakdown voltage
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

Different regions of the trench sidewall are provided with different insulating layer thicknesses and material compositions. The thin gate dielectric layer is positioned adjacent to the channel accommodating body region for proper gate control, while the thick insulating layer with oxide-nitride-oxide stack is positioned adjacent to the drain drift region to provide field redistribution and achieve uniform electrical field profile for enhanced reverse breakdown voltage.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The thick trench sidewall insulating layer is constructed as a composite stack of oxide-nitride-oxide layers. This composite structure provides both the mechanical integrity needed for manufacturing and the electrical field redistribution properties necessary to achieve uniform field profile and increased reverse breakdown voltage in the drain drift region.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration significantly increases the source-drain reverse breakdown voltage and reduces on-resistance while maintaining a simple edge termination, effectively preventing gate-source short-circuits and improving the transistor's overall performance.

Implementation Method 1

the field plate on the thick trench sidewall insulating layer rearranges the electrical field profile in the drain drift region in such a way that it becomes more uniform and will give a substantially linear potential profile. In this way the source-drain reverse breakdown voltage of the transistor is significantly increased by the RESURF effect

Methodology Applied
Scientific EffectRESURF effect: Electric Field

Implementation Method 2

an integral first layer of silicon dioxide extends from the upper surface of the semiconductor body over top corners of each array trench, the integral first layer also providing the thin gate dielectric insulating layer

Methodology Applied
Scientific EffectDielectric insulation: Dielectric

Data Source

PatentUS8222693B2Trench-gate transistors and their manufacture
Publication Date: 2012.07.17 NEXPERIA BV
  • US8222693B2 patent drawing
  • US8222693B2 patent drawing
  • US8222693B2 patent drawing

AI summary

A trench-gate transistor has an integral first layer of silicon dioxide extending from the upper surface of the semiconductor body over top corners of each cell array trench. The integral first layer also provides a thin gate dielectric insulating layer for a thick gate electrode and the integral first layer also provides a first part of a stack of materials which constitute a thick trench sidewall insulating layer for a thin field plate. Consistent with an example embodiment, there is a method of manufacture. A hardmask used to etch the trenches is removed before providing the silicon dioxide layer. The layer is then protected by successive selective etching of the oxide layer and the nitride layer in the upper parts of the trenches. After the gate electrodes are provided, layers for the channel accommodating regions and source regions may be formed through the oxide layer on the upper surface.