Trench-Gate Transistor Structure for Higher Channel Width in Pixels
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Solution Overview
Problem
As pixel count increases in image sensors, bitline setting time also increases due to higher bitline loading, leading to undesirable effects such as short channel effects and noise, while widening channel widths to enhance transconductance results in larger pixel sizes, which is undesirable.
Innovation Solution
The use of trench structures with a polygonal cross-section in source follower and row select transistors, which increases the effective channel width without increasing the planar channel width, thereby enhancing transconductance without enlarging pixel size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the channel width is increased to enhance transconductance, then the transconductance (Gm) is improved, but the pixel size increases
Solution Approach 1:
The patent transitions from a planar channel structure to a three-dimensional trench structure with polygonal cross-section. The channel extends vertically into the substrate, creating additional conductive pathways in the depth dimension. This dimensional change allows the effective channel width to exceed the planar channel width, thereby increasing transconductance without expanding the pixel footprint in the horizontal plane.
2Power
If the channel length is shortened to increase transconductance, then the transconductance (Gm) is improved, but short channel effects and noise increase
Solution Approach 1:
The patent uses vertical channel extension into the substrate to compensate for the shortened horizontal channel length. By creating a three-dimensional trench structure, the effective channel width increases through the vertical dimension, allowing transconductance enhancement without requiring extreme channel length reduction that would cause short channel effects.
3Measurement precision
If the pixel count is increased to improve resolution, then the resolution is improved, but the bitline setting time increases
Solution Approach 1:
The patent changes the physical parameters of the transistor by creating a trench structure with polygonal cross-section. This structural modification increases the effective channel width and transconductance, which directly reduces the bitline setting time. The parameter change in transistor geometry enables faster signal processing, allowing higher pixel counts to be handled without increasing the bitline setting time.
Data Source
AI summary
Methods of forming transistors include providing a substrate material, forming a recess to a first depth in the substrate material, the recess corresponding to a gate region and extending in a channel length direction and a channel width direction that is perpendicular to the channel length direction, forming a trench structure in the substrate material by deepening the recess to a second depth using an isotropic process, forming an isolation layer on the substrate material, forming a gate portion of the isolation layer on the substrate material such that the gate portion of the isolation layer extends into the trench structure, and forming a gate on the isolation layer such that the gate extends into the trench structure.