Trench Gate Power Transistor Self-Aligned Sidewall Spacers
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Solution Overview
Problem
In trench gate type power transistors using the Super Junction structure, malalignment during trench formation can lead to increased ON resistance due to the epitaxial layer acting as a channel, and widening the drain layer to prevent malalignment results in a larger cell pitch and chip area.
Innovation Solution
The trench is formed by self-alignment using side wall spacers as masks, preventing malalignment and ensuring the epitaxial layer does not act as a channel, while allowing for a narrower drain layer width to maintain high breakdown voltage and reduce ON resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the drain layer is widened to prevent malalignment during trench formation, then manufacturing precision is improved, but the cell pitch and chip area increase
Solution Approach 1:
The side wall spacers serve as self-aligned masks that automatically define the trench position based on the drain layer geometry. The trench formation process uses the drain layer's own side walls as references, eliminating the need for separate alignment marks or photolithography steps. This self-service mechanism ensures precise trench positioning without requiring additional process complexity or increasing chip area.
Solution Approach 2:
The side wall spacers act as intermediary structures that mediate between the drain layer and the trench gate formation. These spacers provide a physical barrier and alignment reference that ensures the trench is formed at the correct position. By introducing this intermediary element, the patent achieves precise alignment without needing to widen the drain layer, thus avoiding increased chip area.
2Device complexity
If the trench is formed without self-alignment, then manufacturing complexity is reduced, but ON resistance increases due to malalignment causing epitaxial layer to act as channel
Solution Approach 1:
The side wall spacers enable the trench formation process to self-align automatically. The spacers are formed conformally on the drain layer, and subsequent etching removes material until the trench reaches the substrate, with the spacers automatically defining the trench width and position. This self-service mechanism ensures that the trench is precisely positioned to prevent the epitaxial layer from acting as a channel, thereby maintaining low ON resistance without adding significant process complexity.
3Reliability
If the drain layer width is reduced to decrease ON resistance, then electrical performance is improved, but manufacturing precision becomes more critical due to increased sensitivity to malalignment
Solution Approach 1:
The side wall spacers create a self-aligned system where the trench position is determined by the spacer geometry rather than by photolithography alignment. This self-service mechanism ensures that even narrow drain layers are precisely positioned, as the spacers automatically define the trench location based on the drain layer's own boundaries. This eliminates the need for high-precision photolithography alignment that would otherwise be required for narrow structures.
Data Source
AI summary
A trench gate type power transistor of high performance is provided. A trench gate as a gate electrode is formed in a super junction structure comprising a drain layer and an epitaxial layer. In this case, the gate electrode is formed in such a manner that an upper surface of the epitaxial layer becomes higher than that of a channel layer formed over the drain layer. Then, an insulating film is formed over each of the channel layer and the epitaxial layer and thereafter a part of the insulating film is removed to form side wall spacers over side walls of the epitaxial layer. Subsequently, with the side wall spacers as masks, a part of the channel layer and that of the drain layer are removed to form a trench for a trench gate.