Trench IGBT Base Region Doping for Threshold Stability
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Solution Overview
Problem
Conventional trench IGBTs face challenges in achieving low ON-state voltage, high-speed switching performance, uniform electric field distribution, and stable gate threshold voltage due to dense trench structures and floating mesa regions, which affect switching losses and breakdown voltage.
Innovation Solution
The implementation of a trench gate structure with uniformly distributed unit cells, where the p-type base region is doped with a low impurity concentration and ion implantation windows overlap with n+-type emitter regions, and the formation of heavily doped p+-type contact regions to stabilize the gate threshold voltage and reduce switching losses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If trench structures are formed densely to increase channel density, then switching performance is improved, but gate threshold voltage becomes unstable and ON-state voltage increases
Solution Approach 1:
The patent applies local quality by creating distinct doping regions with different impurity concentrations within the base region. Specifically, a first base region portion has a first impurity concentration while a second base region portion has a second impurity concentration that is lower than the first. This localized variation in doping concentration allows different areas to serve different functions: one area stabilizes the gate threshold voltage while the other maintains low ON-state voltage, thereby resolving the contradiction between switching performance and voltage stability.
2Speed
If trench structures are formed densely to increase channel density, then switching performance is improved, but ON-state voltage increases
Solution Approach 1:
The patent implements local quality by establishing a second base region portion with lower impurity concentration adjacent to the emitter region. This localized low-doping area reduces the ON-state voltage by minimizing recombination losses and improving carrier injection efficiency, while the adjacent first base region portion with higher doping concentration maintains stable gate threshold voltage. This spatial differentiation allows the device to achieve both low ON-state voltage and stable threshold voltage simultaneously.
3Ease of manufacture
If mesa regions are left floating to simplify structure, then manufacturing is easier, but electric field distribution becomes non-uniform and breakdown voltage decreases
Solution Approach 1:
The patent applies parameter changes by modifying the electrical potential state of the mesa regions. Instead of leaving them floating, the invention connects the mesa regions to the emitter electrode through the interlayer insulator, thereby changing their electrical parameter from floating potential to fixed potential. This parameter change ensures uniform electric field distribution across the device, prevents premature breakdown, and maintains high breakdown voltage while preserving the structural simplicity of the trench gate configuration.
4Manufacturing precision
If ion implantation windows overlap with emitter regions to form base regions, then manufacturing precision is improved, but impurity concentration distribution becomes non-uniform
Solution Approach 1:
The patent resolves this contradiction by intentionally creating local quality variations in impurity concentration. The overlapping ion implantation windows produce a first base region portion with higher impurity concentration and a second base region portion with lower impurity concentration. This controlled non-uniformity is not a defect but a deliberate design feature that enables different functional regions: the higher-doped area provides stable gate threshold voltage while the lower-doped area ensures low ON-state voltage. Thus, the manufacturing precision achieves the desired spatial distribution of doping concentrations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach minimizes threshold voltage variations, enhances breakdown voltage, and reduces switching losses while maintaining low ON-state voltage and high-speed switching performance.
Implementation Method 1
in a portion of the p-type base region in contact with the gate electrode via the gate insulator film, the impurity concentration in the portion of a p-type base region sandwiched between the bottom plane of the p-type base region and the bottom plane of an n+-type emitter region and parallel to the major surface of a semiconductor substrate is the lowest
Implementation Method 2
ion implantation windows overlap with n+-type emitter regions
Data Source
AI summary
A trench-type insulated-gate semiconductor device is disclosed that includes unit cells having a trench gate structure that are scattered uniformly throughout the active region of the device. The impurity concentration in the portion of a p-type base region, sandwiched between an n+-type emitter region and an n-type drift layer and in contact with a gate electrode formed in the trench via a gate insulator film, is the lowest in the portion thereof sandwiched between the bottom plane of n+-type emitter regions and the bottom plane of p-type base region and parallel to the major surface of a silicon substrate. The trench-type insulate-gate semiconductor device according to the invention minimizes the variation of the gate threshold voltage.