Trench Gate IGBT Emitter Layout for Cgc/Cge Ratio Control
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Solution Overview
Problem
Conventional semiconductor devices with trench gate type insulated gate bipolar transistors (IGBTs) face a challenge in suppressing the decrease in the gate-collector capacitance to gate-emitter capacitance ratio (Cgc/Cge), which leads to increased turn-on speed and voltage change speed of the freewheeling diode, necessitating a sacrifice in IGBT turn-on characteristics.
Innovation Solution
The semiconductor device incorporates a first carrier accumulation layer with higher impurity concentration in the active region and a second carrier accumulation layer with lower impurity concentration in the thinned region, along with a contact layer in the thinned region in contact with the emitter electrode, to manage capacitance ratios and maintain IGBT characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the gate-emitter capacitance (Cge) is increased and the gate-collector capacitance (Cgc) is decreased, then the turn-on speed of the IGBT increases, but the voltage change speed (dv/dt) of the freewheeling diode increases, which deteriorates device characteristics
Solution Approach 1:
The patent applies local quality by differentiating the impurity concentration of carrier accumulation layers between two distinct regions: the active region (first carrier accumulation layer with higher impurity concentration) and the thinned region (second carrier accumulation layer with lower impurity concentration). This spatial differentiation allows the active region to achieve fast turn-on speed while the thinned region suppresses excessive dv/dt, resolving the contradiction between speed improvement and harmful effect suppression.
Solution Approach 2:
The patent segments the carrier accumulation layer into two separate layers with different impurity concentrations positioned in different regions of the semiconductor device. The first carrier accumulation layer is located in the active region, while the second carrier accumulation layer is located in the thinned region. This segmentation enables independent optimization of electrical characteristics in each region, allowing fast turn-on in the active region while controlling dv/dt in the thinned region.
2Object-generated harmful factors
If dummy trenches are provided to control energizing current and parasitic capacitance, then the capacitance ratio (Cgc/Cge) decreases, but this sacrifices turn-on characteristics of the IGBT
Solution Approach 1:
The patent changes the impurity concentration parameter of the carrier accumulation layer to resolve the contradiction. By setting the first carrier accumulation layer with higher impurity concentration in the active region and the second carrier accumulation layer with lower impurity concentration in the thinned region, the patent optimizes both capacitance control and turn-on characteristics without mutual sacrifice.
Solution Approach 2:
The patent applies local quality by tailoring the impurity concentration of carrier accumulation layers to specific functional regions. The active region receives a high impurity concentration layer for fast turn-on, while the thinned region receives a low impurity concentration layer for capacitance control, eliminating the need to sacrifice turn-on characteristics for parasitic capacitance management.
Data Source
AI summary
A trench gate type semiconductor device is provided with an active region that is a region where an n+-type emitter layer is provided adjacent to a trench and a thinned region that is a region where the n+-type emitter layer is not provided adjacent to the trench. In the active region, a first n-type carrier accumulation layer is provided as a carrier accumulation layer. In the thinned region, a second n-type carrier accumulation layer having a lower impurity concentration than the first n-type carrier accumulation layer is provided as the carrier accumulation layer. A p+-type contact layer in the thinned region has a portion in contact with an emitter electrode.