Trench IGBT Stored-Layer Layout for Gate Threshold Stability
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Solution Overview
Problem
Conventional semiconductor devices with trench portions face issues due to ion implantation being performed at a predetermined angle, leading to deceleration of ions near the resist, resulting in a shallowly formed stored layer and potentially lower gate threshold.
Innovation Solution
A semiconductor device design featuring a semiconductor substrate with a drift layer, a base region, and accumulation regions of higher impurity concentration, including a first accumulation region and a second accumulation region formed more shallowly, which are strategically positioned between trench portions to address the issues of ion implantation and gate threshold.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If ion implantation is performed at a predetermined angle to prevent channeling, then channeling is prevented, but ions are decelerated in the vicinity of the resist causing the stored layer to be shallowly formed and gate threshold to be lowered
Solution Approach 1:
The stored layer is divided into two distinct regions: a first stored layer formed at a deeper position and a second stored layer formed at a shallower position near the boundary. This segmentation allows each region to serve different functions - the first stored layer maintains proper gate threshold while the second stored layer addresses the shallow formation issue at boundaries
Solution Approach 2:
Different impurity concentration distributions are applied to different regions of the semiconductor device. The first stored layer has a specific impurity concentration profile in the main region, while the second stored layer has a different impurity concentration profile at the boundary, allowing each region to be optimized for its specific requirements
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed design enhances the formation of the accumulation regions, preventing shallow formation and maintaining a higher gate threshold, thereby improving the semiconductor device's performance and reliability.
Implementation Method 1
Also, if the stored layer is formed by ion implantation, the ion implantation is performed at a predetermined angle in order to prevent channeling.
Data Source
AI summary
A device includes a substrate, a drift region in the substrate, a base region above the drift region; a first high concentration region selectively formed in a part on a surface side of the base region and having a concentration higher than the drift region; a trench portion formed in a front surface of the substrate and including extending portions; and mesa portions between the extending portions. The mesa portions includes first mesa portions having the first high concentration region and second mesa portions not having the first high concentration region, the trench portion includes a first trench portion having an first conductive portion (a gate conductive portion) and adjacent to the first mesa portion, a second trench portion having the first conductive portion and adjacent to the second mesa portion, and a third trench portion having an second conductive portion and adjacent to the first or second mesa portion.