Trench Gate IGBT Edge Structure to Block Parasitic NMOS Conduction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In IE type trench gate IGBTs, the use of high-concentration N-type layers for electric isolation leads to phosphorus leaching from interlayer insulating films, causing parasitic NMOS conduction and deteriorating ID-VG properties due to reduced effective channel-impurity concentration.

Innovation Solution

A semiconductor device design incorporating a hole barrier region of a first conductivity type between the end trench gate and emitter electrodes, connected by a body region that separates the P-type floating and body regions, preventing hole leakage and maintaining high resistance against parasitic NMOS conduction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a high-concentration N-type layer is used in the interlayer insulating film to achieve electric isolation between P-type regions, then isolation effectiveness is improved, but phosphorus leaching occurs which lowers the effective channel-impurity concentration of parasitic NMOS and causes it to conduct, deteriorating ID-VG property

Engineering Contradiction:
Improveelectric isolation effectivenessVSAvoidphosphorus leaching
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

An N-type impurity concentration gradient layer is introduced as an intermediary between the high-concentration N-type layer and the P-type body region. This gradient layer acts as a mediator that prevents direct contact and interaction between phosphorus from the high-concentration N-type layer and the P-type body region, thereby blocking phosphorus leaching while maintaining electric isolation effectiveness.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent converts the potentially harmful high-concentration N-type layer that causes phosphorus leaching into a beneficial structure by adding the N-type impurity concentration gradient layer. The high-concentration N-type layer continues to provide electric isolation, while the gradient layer prevents phosphorus diffusion, thus converting a harmful effect into a beneficial dual-function structure.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Power

If phosphorus is used as N-type impurity in the interlayer insulating film to improve conductivity, then electrical conductivity is improved, but phosphorus leaching to the channel region lowers effective channel-impurity concentration and causes parasitic NMOS conduction

Engineering Contradiction:
Improveelectrical conductivityVSAvoidID-VG property
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The N-type impurity distribution is segmented into multiple layers with different concentration gradients. The interlayer insulating film contains phosphorus for conductivity, while a separate N-type impurity concentration gradient layer with decreasing phosphorus concentration toward the channel region prevents leaching, thus maintaining both conductivity and reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The N-type impurity concentration is varied locally across different regions. The interlayer insulating film has high phosphorus concentration for conductivity, while the N-type impurity concentration gradient layer has decreasing phosphorus concentration toward the channel region to prevent leaching, achieving local optimization of both conductivity and reliability.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design improves ID-VG properties by preventing parasitic NMOS conduction and maintaining effective carrier modulation, enhancing the injection efficiency and reducing VCE(sat) while avoiding kinking in the ID-VG waveform.

Implementation Method 1

a hole barrier region of a first conductivity type is provided under a body region of a second conductivity type

Methodology Applied
Scientific EffectHole barrier effect: Diffusion Barrier

Implementation Method 2

phosphorus, which is an N-type impurity, may leach out to a surface of a channel region of the parasitic NMOS

Methodology Applied
Scientific EffectImpurity leaching: Diffusion

Data Source

PatentUS20230420550A1Semiconductor device and method of manufacturing the same
Publication Date: 2023.12.28 RENESAS ELECTRONICS CORP
  • US20230420550A1 patent drawing
  • US20230420550A1 patent drawing
  • US20230420550A1 patent drawing

AI summary

A semiconductor device includes a trench emitter electrode located at a boundary between one end of an active cell region and an inactive cell region, a trench gate electrode located at a boundary between the other end of the active cell region and the inactive cell region, an end trench gate electrode connected to one end of the trench gate electrode, and an end trench emitter electrode connected to one end of the trench emitter electrode. A hole barrier region of a first conductivity type is provided under a body region of a second conductivity type between the end trench gate electrode and the end trench emitter electrode in a plan view. A body region in the active cell region and a body region in the inactive cell region are connected to each other by a body region between the end trench gate electrode and the end trench emitter electrode.