Trench Isolation Structure With Patterned Buffer Layer For FinFET
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional semiconductor device manufacturing methods face issues with bridging between the polycrystalline silicon pseudo gate and source regions due to short inter-fin distances, leading to performance deterioration, and excessive silicon dioxide etching in Single Diffusion Break (SDB) processes results in impaired device performance.
Innovation Solution
A semiconductor device manufacturing method involving a trench isolation structure with a patterned buffer layer and insulation layer, where the buffer layer is etched to expose the trench isolation structure, and an insulation layer is formed to match the horizontal level of the semiconductor fin, reducing oxide loss and bridging risks through a fluorine-based plasma treatment and deposition processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the inter-fin distance is reduced to increase circuit density, then the chip area is reduced, but bridging between the pseudo gate and source region occurs
Solution Approach 1:
The patent introduces a vertical dimension solution by forming a depression in the trench isolation structure and filling it with insulation material. This creates a stepped configuration where the pseudo gate is positioned at a lower vertical level, increasing the vertical distance between the pseudo gate and source region while maintaining the same horizontal inter-fin distance. This dimensional transition effectively prevents bridging without sacrificing circuit density.
2Reliability
If the silicon dioxide layer is raised in the trench isolation structure to prevent bridging, then the bridging risk is reduced, but excessive silicon dioxide is etched and lost during SDB processes
Solution Approach 1:
The patent performs preliminary action by forming the depression and filling it with insulation material before the SDB process. This pre-prepared structure provides adequate insulation and spacing from the beginning, eliminating the need for excessive silicon dioxide that would otherwise be etched away during SDB processes. The depression structure is designed to provide the necessary isolation without relying on thick silicon dioxide layers that are prone to etching loss.
3Ease of manufacture
If the trench isolation structure is etched to expose the semiconductor fin, then the fin is exposed for further processing, but the silicon dioxide in the trench isolation structure is excessively etched and lost
Solution Approach 1:
The patent applies local quality by creating a depression only in the specific region where the trench isolation structure contacts the semiconductor fin, while leaving other regions of the trench isolation structure intact. This localized modification provides the necessary fin exposure for processing while preserving the silicon dioxide in areas where it is still needed for isolation and structural support, thereby minimizing overall silicon dioxide loss.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively reduces oxide loss and minimizes bridging between semiconductor fins, enhancing the reliability and performance of semiconductor devices by maintaining the horizontal level of insulation and fin surfaces and increasing the distance between fins and pseudo gates.
Implementation Method 1
conducting an etch-back process on the insulation layer, a portion of the buffer layer may also be removed
Implementation Method 2
excessive silicon dioxide in the trench isolation structure may be etched and lost
Implementation Method 3
forming an insulation layer in the opening
Implementation Method 4
forming an insulation layer in the opening, with an upper surface of the insulation layer and the upper surface of the semiconductor fin substantially on the same horizontal level
Data Source
AI summary
A semiconductor device manufacturing method is presented. The method entails providing a semiconductor structure comprising a substrate, one or more semiconductor fins on the substrate, and a trench isolation structure around each semiconductor fin, wherein the trench isolation structure comprises a first component intersecting an extension direction of the semiconductor fin and a second component parallel with the extension direction; etching the trench isolation structure to expose a portion of the semiconductor fin; forming a patterned buffer layer on the semiconductor structure covering the second component and having an opening exposing the first component; forming an insulation layer in the opening, with upper surfaces of the insulation layer and the semiconductor fin substantially on the same horizontal level; and removing the buffer layer. This inventive concept reduces, if not eliminates, oxide loss in Single Diffusion Break (SDB) region.