Trench Isolation Capping Layer for Wet Etching Resistance

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Existing methods for forming trench isolation structures in semiconductor devices are inadequate as they are susceptible to damage from wet cleaning processes, leading to varying step heights and divots, which increase process complexity and induce gate leakage current.

Innovation Solution

A method involving the formation of a first dielectric layer in recesses, followed by a capping layer with higher etching resistance, which protects the underlying layer from wet etching and maintains the integrity of the trench isolation structure, reducing gate leakage and step height issues.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If wet cleaning processes are used to clean the semiconductor device, then cleaning effectiveness is improved, but the trench isolation structure is damaged resulting in divots and varying step heights

Engineering Contradiction:

Improvecleaning effectivenessVSAvoidtrench isolation structure integrity

Core Design Contradiction:

Ease of manufactureVSManufacturing precision

Solution Approach 1:

A protective coating is applied to the trench isolation structure before wet cleaning processes. This coating pre-establishes a barrier that prevents the wet cleaning chemicals from attacking and damaging the trench isolation structure, thereby maintaining structural integrity while still allowing effective cleaning to occur.

Inventive Principle:

Principle #9Preliminary anti-action

Solution Approach 2:

The protective coating acts as an intermediary layer between the wet cleaning process and the trench isolation structure. It mediates the interaction by providing a interface that resists chemical attack while allowing the cleaning process to proceed, thus protecting the underlying structure from direct exposure to harmful cleaning agents.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If the trench isolation structure is made more resistant to wet etching, then structural integrity is improved, but the process complexity increases

Engineering Contradiction:

Improvetrench isolation structure resistanceVSAvoidfabrication process complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The trench isolation structure is formed using a composite material system consisting of the base isolation material combined with a protective coating layer. This composite structure provides enhanced resistance to wet etching while the coating material is selected to be compatible with existing fabrication processes, thereby limiting the increase in process complexity.

Inventive Principle:

Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively prevents damage to trench isolation structures during wet cleaning processes, reducing gate leakage and maintaining structural integrity, thereby improving the reliability and efficiency of semiconductor device fabrication.

Implementation Method 1

forming a capping layer over the bottom portion of the first dielectric layer, the capping layer comprising a material that is different from a material of the first dielectric layer and that has a higher etching resistance than the first dielectric layer in a wet etching process

Methodology Applied

Scientific EffectEtching resistance:

Data Source

PatentUS9953878B2Method of forming a semiconductor device

Publication Date: 2018.04.24 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A method of forming a semiconductor device is provided. The method includes forming a recess in a substrate and forming a first dielectric layer in the recess. A portion of the first dielectric layer is removed. A second dielectric layer is formed over the first dielectric layer. A gate structure is formed over the second dielectric layer.