Trench-Mesa Semiconductor Layout for Hole Extraction at Turn-Off
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional semiconductor devices with both transistors and diodes on the same chip face challenges in efficiently extracting holes during turn-off, leading to increased tail current and reduced withstand capability, which affects the device's performance and efficiency.
Innovation Solution
The semiconductor device incorporates a specific structure with trench and mesa portions, including a second conductivity type contact region with higher concentration at the boundary between the transistor and diode portions, and uses dummy trench portions to enhance hole extraction and reduce electric field crowding, along with accumulation regions and carrier passage regions to manage carrier flow.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional structures are used in semiconductor devices with both transistors and diodes on the same chip, then device integration is achieved, but hole extraction efficiency deteriorates leading to increased tail current
Solution Approach 1:
The semiconductor device is divided into multiple mesa portions separated by trench portions, with boundary mesa portions specifically designed for hole extraction. This segmentation allows dedicated regions for different functions (transistor operation, diode operation, and hole extraction) to coexist on the same chip, resolving the contradiction between integration and hole extraction efficiency.
Solution Approach 2:
Boundary mesa portions are given different properties from internal mesa portions - specifically, they have higher concentration contact regions and are positioned to facilitate hole extraction. This local differentiation enables efficient hole extraction at boundaries without compromising the performance of internal transistor and diode regions, thereby reducing tail current while maintaining device functionality.
2Reliability
If conventional structures are used in semiconductor devices, then manufacturing simplicity is maintained, but withstand capability is reduced
Solution Approach 1:
The device structure is segmented into multiple mesa portions with trench portions between them. This segmentation provides physical isolation that prevents harmful interactions between adjacent transistor and diode regions, thereby improving withstand capability and reliability without requiring complex control mechanisms.
Solution Approach 2:
Trench portions act as intermediary structures between adjacent mesa portions, providing electrical isolation and preventing parasitic effects. These trench portions serve as mediators that protect the device against breakdown and improve withstand capability while maintaining a relatively simple manufacturing process.
3Object-affected harmful factors
If conventional structures are used, then device area is minimized, but electric field crowding increases
Solution Approach 1:
By dividing the device into multiple mesa portions separated by trench portions, the electric field is distributed across multiple isolated regions. This segmentation prevents field crowding that would occur in continuous structures, reducing harmful electrical effects while maintaining compact device area through efficient spatial arrangement.
Data Source
AI summary
A semiconductor device, allowing easy hole extraction, including a semiconductor substrate having drift and base regions; and transistor and diode portions, in which trench portions and mesa portions are formed, is provided. The transistor portion includes emitter and contact regions above the base region and exposed to an upper surface of the semiconductor substrate. The emitter region has a higher concentration than the drift region. The contact region has a higher concentration than the base region. The mesa portions include boundary mesa portion(s) at a boundary between the transistor and diode portions. The trench portions include dummy trench portion(s) provided adjacent to a trench portion adjacent to the boundary mesa portion(s) and provided on the transistor portion side relative to the trench portion adjacent to the boundary mesa portion(s). The boundary mesa portion(s) include a base boundary mesa portion in which the base region is exposed to the upper surface.