Semiconductor Trench Metal Deposition for Low-Stress Pattern Integrity
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Solution Overview
Problem
The scaling down of semiconductor devices leads to residual stress accumulation around interfaces of deposited layers, causing line wiggling and distortion of patterns, which affects device performance.
Innovation Solution
A method involving the formation of a first metal material at a low temperature, followed by a second metal material at a higher temperature, and an annealing process to recrystallize both materials, reducing residual stress and enhancing grain size for lower resistivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If deposition temperature is increased to improve deposition rate and grain size, then productivity and electrical conductivity are improved, but residual stress accumulation increases causing line wiggling and pattern distortion
Solution Approach 1:
The patent divides the deposition process into multiple stages with different temperature conditions. A first metal layer is deposited at a lower temperature (350-450°C) to minimize stress, while a second metal layer is deposited at a higher temperature (450-550°C) to improve grain size and conductivity. This segmentation allows each layer to serve different functional purposes without compromising overall pattern integrity.
Solution Approach 2:
The patent changes the deposition temperature parameter between layers to optimize different properties. The first layer uses lower temperature to reduce stress accumulation, while the second layer uses higher temperature to enhance grain growth and electrical conductivity. This parameter variation resolves the contradiction between deposition rate/grain size and pattern precision.
2Reliability
If deposition temperature is increased to enhance grain size and reduce resistivity, then electrical conductivity is improved, but residual stress accumulation increases causing line wiggling
Solution Approach 1:
The patent segments the conductive layer into two metal layers with different deposition temperatures. The first layer at lower temperature provides a stable, low-stress foundation that prevents line wiggling, while the second layer at higher temperature provides the grain structure needed for low resistivity and high electrical conductivity.
Solution Approach 2:
The patent creates a composite structure using two different metal materials (e.g., tungsten and copper, or tungsten and cobalt) with different properties. The first metal layer provides mechanical stability and stress control, while the second metal layer provides optimal electrical conductivity through enhanced grain growth at higher deposition temperature.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach mitigates line wiggling and improves the structural integrity and conductivity of semiconductor devices by reducing residual stress and increasing grain size, resulting in a more effective semiconductor device formation.
Implementation Method 1
performing an annealing process to recrystallize the first and second gate materials at a third temperature higher than the first temperature and the second temperature
Implementation Method 2
the annealing process is performed to recrystallize the first metal material and the second metal material to form a third metal material made out of a homogeneous material
Data Source
AI summary
A method of forming a semiconductor device includes forming a first metal material lining a trench in a semiconductor substrate at a first temperature. The method further includes forming a second metal material lining the first metal material at a second temperature higher than the first temperature. The method further includes performing an annealing process to the first and second metal materials.