Trench-Based MIM Capacitor for Semiconductor Area Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
MIM capacitors in semiconductor devices occupy a large area on the semiconductor substrate, hindering device downsizing due to their conventional parallel flat plate electrode structure, which limits capacitance density and area efficiency.
Innovation Solution
The MIM capacitor is redesigned with a trench-based structure where the lower electrode and capacitor film are formed along the inner surface of a trench, and the upper electrode is opposed to the lower electrode with the capacitor film sandwiched between, allowing for a larger opposed area and reduced overall area occupancy, while maintaining or increasing capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a conventional parallel flat plate electrode structure is used for MIM capacitor, then the structure is simple to manufacture, but the area occupied on semiconductor substrate is large
Solution Approach 1:
The patent transitions from a planar parallel plate structure to a three-dimensional trench-based structure. The lower electrode is formed as a film along the inner surface of a trench, and the upper electrode is formed on the capacitor film, creating a vertical stacking configuration. This dimensional change allows the capacitor to achieve the same capacitance with a smaller footprint on the semiconductor substrate surface.
Solution Approach 2:
The patent embeds the capacitor structure within a trench formed in the insulating layer. The lower electrode lines the inner surface of the trench, the capacitor film is formed on the lower electrode, and the upper electrode is formed on the capacitor film, creating a nested configuration where each component is contained within the previous one. This nesting approach maximizes the use of vertical space and reduces the horizontal area occupied.
2Ease of manufacture
If the lower electrode and upper electrode are formed as parallel flat plates, then the manufacturing process is straightforward, but the capacitance density is limited
Solution Approach 1:
The patent increases capacitance density by transitioning from a two-dimensional parallel plate configuration to a three-dimensional trench structure. The inner surface area of the trench provides a larger effective area for the lower electrode, and the vertical stacking of electrodes and capacitor films increases the capacitance per unit area on the substrate surface.
Solution Approach 2:
The patent concentrates the capacitor structure in a localized trench region, creating high capacitance density in a specific area. The trench configuration allows the capacitor films and electrodes to be densely packed in the vertical direction while maintaining ease of manufacture through standard semiconductor fabrication processes.
3Area of stationary object
If a trench-based structure with film-shaped lower electrode is used, then the area occupied is reduced, but the manufacturing complexity increases
Solution Approach 1:
The patent divides the capacitor structure into distinct segmented components: the trench formation step, the lower electrode film formation on the trench inner surface, the capacitor film formation on the lower electrode, and the upper electrode formation on the capacitor film. This segmentation allows each component to be manufactured using standard semiconductor fabrication processes, reducing overall manufacturing complexity despite the three-dimensional structure.
Data Source
AI summary
A semiconductor device is described includes a wiring layer, an insulating layer stacked on the wiring layer, a trench formed by digging down the insulating layer from the surface thereof, a film-shaped lower electrode formed along the inner surface of the trench, a capacitor film formed along the surface of the lower electrode, and an upper electrode opposed to the lower electrode with the capacitor film sandwiched therebetween.