Trench MIM Capacitor Structure for Coplanar Via Reliability
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Solution Overview
Problem
High capacitance value capacitor structures in advanced AI and HPC components face issues with via opens and short circuits due to multiple metal electrode layers and high dielectric constant film layers, causing step height discrepancies.
Innovation Solution
A metal-insulator-metal (MIM) capacitor structure with a semiconductor substrate featuring first and second trenches of varying depths, a dielectric liner layer, and electrode layers with coplanar top surfaces, along with a capacitor dielectric layer that does not extend onto the substrate surface, and through silicon vias for electrical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple layers of metal electrodes and high dielectric constant film layers are used to achieve high capacitance value, then the capacitance performance is improved, but step height is formed causing via open or short circuit risk
Solution Approach 1:
The patent transitions from a planar capacitor structure to a three-dimensional trench-based structure. By etching trenches into the substrate and forming electrodes along the trench walls and bottom, the capacitor achieves high capacitance density without creating problematic step heights at the surface, thus resolving the contradiction between capacitance performance and manufacturing precision.
Solution Approach 2:
The patent employs a nested structure where the capacitor dielectric layer is positioned within the trench, surrounded by bottom and top electrode layers. This nested arrangement maximizes the capacitance-forming interface area while maintaining a compact footprint and avoiding surface step height issues that would compromise via connections.
2Reliability
If high dielectric constant film layers are used to achieve high capacitance, then the capacitance density improves, but the risk of via open or short circuit increases due to step height formation
Solution Approach 1:
The patent implements the high dielectric constant film as a trench-filled structure rather than a surface layer. This three-dimensional configuration achieves high capacitance density through the volume of the trench while maintaining a planar surface that eliminates step height, thereby preventing via open or short circuit defects.
Data Source
AI summary
A MIM capacitor structure includes a semiconductor substrate, and a first trench and a second trench in the semiconductor substrate in a capacitance forming region. The second trench is adjacent to the first trench. The second trench is deeper than the first trench. A dielectric liner layer conformally covers a top surface of the semiconductor substrate and interior surfaces of the first trench and the second trench. A bottom electrode layer conformally covers the dielectric liner layer. The bottom electrode layer extends onto a top surface of the semiconductor substrate. A capacitor dielectric layer is disposed on the bottom electrode layer in the first trench and the second trench. A top electrode layer is disposed on the capacitor dielectric layer in the first trench and the second trench. The top surface of the top electrode layer is coplanar with the top surface of the bottom electrode layer.