Trench MOSFET Structure for High Blocking Voltage and Low RDS(on)
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Solution Overview
Problem
There is a need to improve the tradeoff between on-state resistance, dimensions, and blocked off-state voltage in transistors, particularly in MOS-type field-effect transistors, which face challenges in balancing high voltage blocking capability with low on-state resistance and compact size.
Innovation Solution
The design includes a semiconductor region delimited by a trench with an electrically-conductive element, a channel area in contact with the semiconductor region, and a doped area, where the conductive element is located opposite the semiconductor region, allowing for increased voltage blocking without increasing on-state resistance by optimizing the doping levels and trench structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Force
If the transistor size is reduced and/or the blocked voltage is increased, then the on-state resistance increases
Solution Approach 1:
The patent introduces a vertical conductive element extending through the trench into the substrate, adding a vertical dimension to the current path. This three-dimensional structure allows the current to flow through multiple paths (surface channel and vertical conductive element), effectively reducing the on-state resistance while maintaining high voltage blocking capability and compact footprint.
Solution Approach 2:
The semiconductor structure is segmented into distinct regions: a surface channel area for voltage control, a trench structure for isolation and voltage blocking, and a vertical conductive element for current conduction. This segmentation allows each region to be optimized independently - the channel for low resistance control and the vertical element for low on-state resistance, resolving the contradiction between high voltage blocking and low on-state resistance.
2Area of stationary object
If the transistor size is reduced, then the voltage blocking capability decreases
Solution Approach 1:
By transitioning from a planar transistor structure to a three-dimensional structure with vertical conductive elements extending into the substrate, the patent achieves high voltage blocking capability within a compact surface footprint. The vertical dimension provides additional space for voltage blocking without increasing the occupied surface area.
Solution Approach 2:
The conductive element is nested within the trench structure, which itself is embedded in the substrate. This nested configuration allows the high voltage blocking function to be achieved within a compact volume, maintaining small surface area while providing sufficient voltage blocking capability through the layered, space-efficient structure.
3Reliability
If the on-state resistance is reduced, then the occupied surface area increases
Solution Approach 1:
The vertical conductive element extending into the substrate provides an additional current conduction path in the vertical dimension, reducing on-state resistance without requiring additional horizontal surface area. This three-dimensional current path allows low resistance while maintaining compact footprint.
Solution Approach 2:
The patent merges the voltage control function (surface channel) with the current conduction function (vertical conductive element) into a single integrated structure. This combination allows both low on-state resistance and compact surface area to be achieved simultaneously by utilizing both surface and subsurface regions for different functions.
Data Source
AI summary
A transistor is disclosed. In an embodiment a transistor includes a first semiconductor region of a substrate, a first trench delimiting the first semiconductor region on a first side, a first electrically-conductive element located in the first trench, a channel area in contact with the first semiconductor region and a first area of contact with the first semiconductor region, wherein the channel area and the first area of contact are on the same surface side of the substrate.


