Vertical Trench MOSFET Current Sensing With Charge-Balanced Isolation
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Solution Overview
Problem
Existing technologies face challenges in achieving a high current sense ratio in vertical trench MOSFETs, particularly in Split Gate Charge Balanced (SGCB) trench MOSFETs, due to complex interactions between sense-FET and main-FET structures, and the need for systems and methods that preserve charge balance.
Innovation Solution
The implementation of vertical sense devices in vertical trench MOSFETs, including a current sense MOSFET with an isolation region between the sense-FET and the main-FET to preserve charge balance, and the use of a sensing diode to sense temperature and/or gate voltage of the main-FET.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a sense-FET is implemented in a vertical trench MOSFET to extend current sensing range, then the current sense ratio is improved, but the charge balance in the main-FET is disrupted
Solution Approach 1:
The patent segments the trench structure by introducing isolation trenches that divide the main-FET into separate regions. These isolation trenches physically separate the sense-FET from the main power FET structures, allowing independent charge balance management. The segmentation enables the sense-FET to operate with its own charge balance conditions while the main-FET maintains its original charge balance, thus resolving the contradiction between achieving high current sense ratio and maintaining charge balance stability.
2Ease of manufacture
If sense-FET structures are integrated with main-FET structures to reduce device complexity, then ease of manufacture is improved, but the current sense ratio is reduced due to complex interactions
Solution Approach 1:
The patent introduces isolation trenches as intermediary structures between the sense-FET and main-FET. These isolation trenches act as mediators that allow the two FET structures to coexist on the same device while minimizing their electrical interactions. The isolation trenches provide physical separation that reduces parasitic effects and cross-talk between the sense-FET and main-FET, enabling high current sense ratio while maintaining ease of manufacture through integrated processing.
3Area of stationary object
If the sense-FET is placed close to the main-FET to reduce device area, then the area is reduced, but the current sensing accuracy is compromised due to electrical interactions
Solution Approach 1:
The patent utilizes vertical dimensionality by implementing isolation trenches that extend deep into the substrate. This vertical separation in the depth dimension allows the sense-FET and main-FET to be positioned close together in the planar dimensions while maintaining electrical isolation through the vertically extending isolation structures. The dimensional transition from planar separation to vertical separation enables compact device layout without compromising current sensing accuracy.
Data Source
Figure 1A~1B
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AI summary
Vertical sense devices in vertical trench MOSFET. In accordance with an embodiment of the present invention, an electronic circuit includes a vertical trench metal oxide semiconductor field effect transistor configured for switching currents of at least one amp and a current sensing field effect transistor configured to provide an indication of drain to source current of the MOSFET. A current sense ratio of the current sensing FET is at least 15 thousand and may be greater than 29 thousand.