Trench Power MOSFET Gate Structure Planarization
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Solution Overview
Problem
Conventional trench power MOSFETs suffer from high drain-to-gate capacitance, leading to increased switching loss and limited suitability for high-frequency circuits, and the presence of recess regions in the inter-electrode dielectric layer reduces the withstand voltage and reliability due to sharp protrusions of the gate electrode.
Innovation Solution
A trench power semiconductor component is manufactured by forming a laminated structure on the inner wall of the cell trench before the inter-electrode dielectric layer, which includes a semiconductor material layer and an initial inner dielectric layer, and then forming a heavily doped semiconductor material in the lower part of the trench, allowing the inter-electrode dielectric layer to be formed without recess regions, thus preventing sharp protrusions and enhancing reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional thermal oxidation process is used to form the inter-electrode dielectric layer, then the dielectric layer can be formed, but recess regions are created at the top surface near the trench sidewalls, causing sharp protrusions in the gate electrode that reduce withstand voltage and reliability
Solution Approach 1:
The patent applies preliminary action by forming a planarization layer of dielectric material over the oxidized semiconductor surface before forming the inter-electrode dielectric layer. This pre-planarization step prevents the formation of recess regions and subsequent sharp gate protrusions, ensuring a flat surface for the inter-electrode dielectric layer and improving reliability without compromising manufacturing feasibility
Solution Approach 2:
The patent introduces a planarization layer as an intermediary element between the oxidized semiconductor surface and the inter-electrode dielectric layer. This intermediate layer fills in the recess regions and provides a flat surface, acting as a mediator that eliminates the harmful sharp protrusions while maintaining the functionality of both the underlying semiconductor structure and the overlying gate electrode
2Ease of manufacture
If the gate electrode is formed to fill the trench including recess regions, then the trench structure can be completed, but sharp protrusions are created at the bottom side of the gate that increase electric field strength and reduce reliability
Solution Approach 1:
The patent applies preliminary action by forming the planarization layer before depositing the gate electrode material. This ensures that the gate electrode is formed on a flat surface rather than filling irregular recess regions, preventing sharp protrusions from forming at the bottom side of the gate while maintaining ease of manufacture through standard deposition processes
Solution Approach 2:
The planarization layer serves as an intermediary between the trench structure and the gate electrode, providing a flat interface that allows the gate electrode to be formed without creating sharp protrusions. This mediator layer ensures both ease of manufacture and improved device reliability by eliminating electric field concentration points
3Ease of manufacture
If thermal oxidation is performed to form the inter-electrode dielectric layer, then the dielectric layer can be created, but the oxidized surface has non-planar features that complicate subsequent gate formation
Solution Approach 1:
The patent applies preliminary action by performing a second thermal oxidation process after forming the initial inter-electrode dielectric layer to create a planarized oxidized surface. This sequential oxidation approach first forms the dielectric layer, then creates a flat surface through additional oxidation, ensuring both ease of manufacture and high surface planarity for subsequent processing steps
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach results in a trench power semiconductor component that can withstand higher gate voltage and improves reliability by eliminating recess regions, thereby reducing switching loss and enhancing performance in high-frequency applications.
Implementation Method 1
forming a heavily doped semiconductor material in a lower part of the cell trench
Implementation Method 2
thermal oxidation process for forming the inter-electrode dielectric layer
Data Source
AI summary
The present disclosure provides a trench power semiconductor component and a method of manufacturing the same. The trench gate structure of the trench power semiconductor component includes a shielding electrode, a gate electrode disposed above the shielding electrode, and an inter-electrode dielectric layer. Before the formation of the inter-electrode dielectric layer, the step of forming the trench gate structure includes: forming a laminated structure covering the inner wall surface of the cell trench, in which the laminated structure includes a semiconductor material layer and an initial inner dielectric layer covering the semiconductor material layer; forming a heavily-doped semiconductor material in the lower part of the cell trench; and removing a portion of the initial inner dielectric layer located at an upper part of the cell trench to expose an upper half portion of the semiconductor material layer and a top portion of the heavily doped semiconductor material.