Trench MOSFET Polysilicon Structure for Lower Rdson

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Solution Overview

Problem

Existing semiconductor devices face challenges in reducing the drain-source on resistance (Rdson) due to fixed drain side substrate spreading resistance, which increases total Rdson, especially for low breakdown voltage classes.

Innovation Solution

A semiconductor device structure featuring a silicon substrate with a channel and drift region, including multiple polysilicon layers isolated by gate oxide and RESURF oxide, which creates a bi-directional MOSFET device that skips substrate spreading resistance, allowing for a single bi-directional switch instead of two unidirectional switches in series, reducing Rdson.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If backside metallization and deep implants are used to reduce bidirectional resistance and drain side EPI spreading resistance, then these resistances are reduced, but drain side substrate spreading resistance cannot be managed and adds directly to technology Rdson

Engineering Contradiction:
ImproveRdsonVSAvoiddevice structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces a third polysilicon layer positioned in the drift region that extends laterally beyond the channel region, creating a three-dimensional configuration. This lateral extension into the drift region allows the control electrode to influence the electric field distribution in a new spatial dimension, effectively reducing substrate spreading resistance without requiring complex backside metallization or deep implants.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If multiple polysilicon layers are used to reduce substrate spreading resistance, then Rdson is reduced, but device structure becomes more complex

Engineering Contradiction:
ImproveRdsonVSAvoidpolysilicon layer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The control electrode is segmented into three distinct polysilicon layers positioned at different locations: one in the channel region and two in the drift region. This segmentation allows each layer to independently influence specific regions of the electric field, with the third layer specifically targeting substrate spreading resistance reduction. The segmented structure achieves superior electrical performance while maintaining manufacturing feasibility through standardized layer deposition processes.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration significantly reduces Rdson by eliminating substrate spreading resistance, enhancing thermal and electrical efficiency and increasing breakdown voltage, resulting in improved semiconductor device performance.

Implementation Method 1

The semiconductor device comprises a first polysilicon layer and the second polysilicon layer and the third polysilicon layer that are isolated by a gate oxide and a RESURF oxide respectively, from the channel and from the drift and from each other

Methodology Applied
Scientific EffectElectrical insulation by oxide layers: Dielectric

Data Source

PatentUS20240079494A1Semiconductor Device and a Method of Manufacturing of a Semiconductor Device
Publication Date: 2024.03.07 NEXPERIA BV
  • US20240079494A1 patent drawing
  • US20240079494A1 patent drawing

AI summary

The present disclosure proposes a semiconductor device including a silicon substrate; a channel positioned on the top surface of the substrate; a drift region positioned on the top of the channel; a trench; a first polysilicon layer positioned within the channel and the drift region on the bottom of the trench; a second polysilicon layer positioned on the top of the first polysilicon layer, and positioned within the drift region inside of the trench; a third polysilicon layer positioned on the top of the second polysilicon layer, and positioned within the drift region inside of the trench. The first polysilicon layer and the second polysilicon layer and the third polysilicon layer are isolated by a gate oxide and a RESURF oxide respectively, from the channel and from the drift and from each other forming at least partially three separated structures.