Trench Gate MOSFET Layout for Low On-Resistance and Reliability
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Solution Overview
Problem
Existing insulated-gate semiconductor devices using wide band gap semiconductors, such as silicon carbide, require further improvements in structure and manufacturing methods to enhance performance and reliability, particularly in trench gate MOSFETs.
Innovation Solution
The device incorporates a chip structure with multiple trenches having sidewalls with different inclination angles, featuring a first conductivity type main-electrode region, a second conductivity type base region, a first conductivity type drift layer, and a second conductivity type gate protection-region, with impurity concentrations tailored to optimize electron mobility and reliability, and includes a Schottky barrier diode between adjacent unit cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a trench gate MOSFET uses a wide band gap semiconductor with conventional symmetric trench structure, then manufacturing is simpler, but electron mobility and on-resistance performance are insufficient
Solution Approach 1:
The patent applies asymmetry by configuring the trench gate structure with different sidewall inclination angles: one sidewall has a first inclination angle while the other sidewall has a second inclination angle different from the first. This asymmetric configuration optimizes the electric field distribution and carrier mobility in the drift region, thereby improving on-resistance performance without significantly complicating the manufacturing process.
Solution Approach 2:
The patent implements local quality by creating regions with different impurity concentrations within the drift layer. Specifically, it includes a first drift region with a first impurity concentration and a second drift region with a second impurity concentration different from the first. This localized variation in impurity concentration optimizes carrier transport in different areas of the device, enhancing overall electron mobility and reducing on-resistance.
2Reliability
If impurity concentration is increased in the drift layer to reduce on-resistance, then conductivity improves, but electron mobility decreases
Solution Approach 1:
The patent resolves this contradiction by implementing local quality through spatially varying impurity concentrations. The drift layer is divided into a first drift region with a first impurity concentration optimized for conductivity and a second drift region with a second impurity concentration optimized for electron mobility. This localized differentiation allows each region to perform its specific function optimally, achieving low on-resistance while maintaining high electron mobility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This structure enhances electron mobility and improves reliability by alternating impurity concentrations and using operation suppression regions, leading to improved performance and reduced on-resistance in trench gate MOSFETs.
Implementation Method 1
a Schottky barrier diode implemented by the drift layer and the main electrode located between the adjacent unit cells is embedded
Data Source
AI summary
An insulated-gate semiconductor device, which has trenches arranged in a chip structure, the trenches defining both sidewalls in a first and second sidewall surface facing each other, includes: a first unit cell including a main electrode region in contact with a first sidewall surface of a first trench, a base region in contact with a bottom surface of the main-electrode region and the first sidewall surface, a drift layer in contact with a bottom surface of the base region and the first sidewall surface, and a gate protection-region in contact with the second sidewall surface and a bottom surface of the first trench; and a second unit cell including an operation suppression region in contact with a first sidewall surface and a second sidewall surface of a second trench, wherein the second unit cell includes the second trench located at one end of an array of the trenches.