Trench MOSFET Channel Implantation With Self-Aligned Trench Etch
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Solution Overview
Problem
Current semiconductor device manufacturing methods face challenges in reducing production steps and achieving smaller structures, particularly in trench MOSFETs, which limit current densities due to large trench pitch and width, hindering the exploitation of wide bandgap semiconductor advantages.
Innovation Solution
A method involving self-aligned channel implantation and trench etch, reducing the number of lithography steps, and using a mask with varying thickness sections to control dopant implantation and auxiliary layer deposition, allowing for smaller structure production and improved carrier mobility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional lithography steps are used for channel implantation and trench etch, then manufacturing precision is achieved, but device complexity and production steps increase
Solution Approach 1:
The patent combines channel implantation and trench etch into a single self-aligned process step. The mask structure with different thickness sections allows both operations to be performed simultaneously without requiring separate lithography steps, thereby reducing production complexity while maintaining precision
Solution Approach 2:
The mask is prepared in advance with varying thickness sections before the implantation process. This preliminary structuring of the mask enables the self-aligned channel implantation to occur automatically during the doping step, eliminating the need for subsequent alignment steps and reducing overall process complexity
2Productivity
If trench pitch and width are reduced to increase cell density, then current density improves, but manufacturing precision requirements increase
Solution Approach 1:
The mask exhibits local quality variations through different thickness sections. The first section with greater thickness provides enhanced protection and precision control for the channel implantation area, while the second section allows for the desired trench dimensions. This local differentiation enables precise control of small trench features without compromising manufacturing feasibility
Solution Approach 2:
The self-aligned process allows the mask structure itself to define the precise trench boundaries and channel locations automatically. The dopant implantation is self-guided by the mask geometry, eliminating the need for additional alignment procedures and enabling precise fabrication of small trench structures
3Manufacturing precision
If mask thickness is increased to improve dopant blocking, then manufacturing precision improves, but device dimensions increase
Solution Approach 1:
The mask is designed with non-uniform thickness, having a first section with greater thickness for superior dopant blocking and precision control, and a second section with reduced thickness where full blocking is not required. This local differentiation optimizes the balance between precision requirements and overall device dimensions
Solution Approach 2:
The mask provides excessive dopant blocking only in the first section where precision is critical for channel formation, while allowing partial dopant penetration or using thinner mask material in the second section where such extreme precision is not required, thereby optimizing the overall device dimensions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables the production of semiconductor devices with reduced lateral extensions, achieving higher current densities and optimized carrier mobility, while minimizing production steps and enabling smaller structure fabrication.
Implementation Method 1
The mask is thicker in the at least one second section than in the at least one first section. Forming the channel region comprises implanting first-type dopants through the top side into the semiconductor body
Implementation Method 2
an auxiliary layer is deposited on a lateral side of the at least one second section, said lateral side facing towards the at least one first section. Thereby, the lateral extension of the at least one second section is increased and the lateral extension of the at least one first section is reduced
Implementation Method 3
Forming the channel region comprises implanting first-type dopants through the top side into the semiconductor body
Data Source
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AI summary
According to an embodiment, the method comprises a step of providing a semiconductor body (1) with a top side (10). A mask (2) is applied on the top side of the semiconductor body, wherein the mask comprises at least one first section (21) and at least one second section (22). The at least one second section is laterally adjacent to the at least one first section. The mask is thicker in the at least one second section than in the at least one first section. In a further step, a channel region (11) of a first conductivity type is formed in the semiconductor body (1) in the area of the at least one first section. Forming the channel region comprises implanting first-type dopants through the top side into the semiconductor body. In a further step, an auxiliary layer (3) is deposited on a lateral side (22a) of the at least one second section, said lateral side facing towards the at least one first section. Thereby, the lateral extension of the at least one second section is increased and the lateral extension of the at least one first section is reduced. In a further step, a hole is produced in the semiconductor body in the area of the first section with the reduced lateral extension so that the hole extends from the top side through the channel region.