Trench Power MOSFET Shielding Electrode Spacing Layer
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Solution Overview
Problem
Current power MOSFETs face high gate/drain capacitance (Cgd) leading to increased switching loss and limited switching speed, which is detrimental for high-frequency applications, and existing shielding electrodes do not effectively balance avalanche voltage and on-resistance.
Innovation Solution
A manufacturing method for trench power semiconductor devices involves forming a protective layer and a spacing layer on the epitaxial layer and trench sidewall to prevent oxidation during thermal processing, allowing for a separate initial spacing layer that alleviates electric field distribution at the trench bottom, thereby increasing avalanche voltage without compromising on-resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a shielding electrode is added at the lower portion of the gate trench, then the avalanche voltage increases and gate/drain capacitance decreases, but the manufacturing process becomes more complex and oxidation control becomes difficult
Solution Approach 1:
The patent segments the trench gate structure into distinct functional zones: a shielding electrode at the lower portion for avalanche protection, an inter-electrode dielectric layer for insulation, and a gate electrode at the upper portion for control. This segmentation allows each component to independently perform its function, achieving high avalanche voltage without compromising manufacturing feasibility
Solution Approach 2:
The patent introduces an inter-electrode dielectric layer as an intermediary between the shielding electrode and the gate electrode. This intermediate layer prevents direct electrical contact while allowing the shielding electrode to function effectively, resolving the complexity of integrating multiple electrodes in the trench structure
2Manufacturing precision
If thermal oxidation process is applied to form dielectric layers, then the dielectric quality improves, but the epitaxial layer surface and trench sidewalls become oxidized
Solution Approach 1:
The patent applies preliminary anti-action by forming a protective coating on the epitaxial layer surface and trench sidewalls before the thermal oxidation process. This protective layer prevents oxygen from reaching and oxidizing the silicon surfaces during high-temperature processing, while still allowing the thermal oxidation to proceed effectively for dielectric layer formation
Solution Approach 2:
The protective coating acts as an intermediary barrier between the oxygen environment and the silicon surfaces during thermal oxidation. It allows the thermal energy to penetrate for dielectric formation while blocking oxygen diffusion to the silicon, thus decoupling the beneficial thermal effects from the harmful oxidation effects
3Ease of manufacture
If the spacing layer is formed continuously at the bottom of the trench, then the manufacturing process is simpler, but the electric field distribution at the trench bottom deteriorates and avalanche voltage decreases
Solution Approach 1:
The patent segments the spacing layer into discontinuous portions at the bottom of the trench rather than forming a continuous layer. This segmentation creates electric field relief zones that prevent field concentration, improving avalanche voltage while maintaining manufacturing simplicity through a modified deposition process
Solution Approach 2:
The patent applies local quality by creating different spacing layer configurations in different regions: discontinuous spacing at the trench bottom for electric field management, and continuous spacing on the sidewalls for protection. This localized differentiation optimizes both manufacturing ease and device performance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method enhances avalanche voltage while maintaining low on-resistance, reducing switching losses and improving device performance for high-frequency applications, with simulation tests showing a 50% decrease in on-resistance and improved electric field distribution.
Implementation Method 1
the protective layer and a spacing layer are formed on a surface of an epitaxial layer and a sidewall of a trench. According to such disclosure, the surface of the epitaxial layer and the sidewall of the trench will not be oxidized during the thermal oxidation process
Implementation Method 2
during the thermal oxidation process
Data Source
AI summary
A manufacturing method of a trench power semiconductor device is provided. The manufacturing method includes the steps of forming a protective layer on an epitaxial layer and forming a trench gate structure in a trench formed in an epitaxial layer. The trench gate structure includes a shielding electrode, a gate disposed on the shielding electrode and an inter-electrode dielectric layer disposed therebetween. The step of forming the trench gate structure includes forming an insulating layer covering an inner surface of the trench; and before the step of forming the inter-electrode dielectric layer, forming an initial spacing layer, the spacing layer including a first sidewall portion and a second sidewall portion, both of which include bottom end portions spaced apart from each other and extending portions protruding from the protective layer.