Trench Non-Volatile Memory Using Liner Layer as Charge Storage
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Solution Overview
Problem
The integration degree and operation characteristics of embedded memory in System on Chip (SoC) devices are limited due to the need for additional processes beyond logic processes in forming the memory layer, which degrades logic compatibility and device characteristics.
Innovation Solution
A non-volatile memory device using a liner layer formed during the trench-type isolation structure fabrication process as the memory layer, comprising a wall oxide layer, a liner nitride layer, and a liner oxide layer, instead of forming a memory layer through additional processes, thereby maintaining logic compatibility and improving integration and operation characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a memory layer is formed through additional processes beyond logic processes, then the memory function can be achieved, but the logic compatibility and device characteristics are degraded
Solution Approach 1:
The liner layer formed during trench isolation fabrication is made to serve dual purposes: it functions as both the isolation structure liner and the memory layer for charge storage. This eliminates the need for separate memory layer formation processes and maintains logic compatibility while achieving memory functionality.
Solution Approach 2:
The trench isolation fabrication process itself is made to produce the memory layer structure. The liner layer that is naturally formed during isolation trench fabrication serves the additional function of being the memory layer, making the process self-sufficient and eliminating additional manufacturing steps.
2Adaptability or versatility
If embedded memory is fabricated based on logic process or CMOS process, then logic compatibility is maintained, but the integration degree and operation characteristics cannot be improved
Solution Approach 1:
The liner layer is selectively formed only in the trench isolation regions where memory cells are to be located, while maintaining the standard logic process elsewhere. This localized approach allows improved integration degree in memory regions without affecting logic circuit operation characteristics.
Solution Approach 2:
The memory functionality is achieved by utilizing the vertical dimension of the trench structure. The liner layer is formed on the trench walls and bottom, creating a three-dimensional charge storage structure that increases integration density without compromising planar logic circuit operations.
3Ease of manufacture
If additional processes are used to form the memory layer, then the memory device can be fabricated, but the manufacturing complexity and process time increase
Solution Approach 1:
The memory layer formation process is merged with the trench isolation fabrication process. Both the isolation structure and the memory layer are created in the same fabrication sequence, eliminating redundant process steps and reducing overall fabrication time.
Solution Approach 2:
The liner layer that will serve as the memory layer is formed preliminarily during the trench isolation fabrication process, before dedicated memory processing would normally begin. This preliminary action eliminates the need for subsequent memory layer formation steps.
Data Source
AI summary
A non-volatile memory device may include a first well of a first conductive type formed over a substrate, a second well of a second conductive type formed over the substrate to contact the first well, a trench formed over the substrate on a border formed by the contact of the first well and the second well, and a memory gate having a memory layer formed over a surface of the trench, and a gate electrode formed to fill the trench over the memory layer.