Semiconductor Trench Patterning With Spacers to Reduce Distortion
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Solution Overview
Problem
The semiconductor industry faces challenges in reducing irregularities and distortions in patterns formed during the lithography process, leading to misalignment and altered electrical properties of semiconductor devices, particularly when feature sizes are scaled down.
Innovation Solution
A method is introduced that involves forming L-shape and T-shape trenches using multiple lithography and etch cycles with the aid of spacers to ensure precise etching and minimize distortions, employing hard masks and spacer layers to achieve etching selectivity and control the formation of features with accurate angles and spacing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If single lithography and etch cycle is used, then manufacturing process is simple, but rounded corner distortions and line end shortening occur
Solution Approach 1:
The patent divides the trench formation process into multiple separate lithography and etch cycles, where each cycle forms a portion of the final trench pattern. This segmentation allows each individual feature to be formed with higher precision, eliminating rounded corner distortions and line end shortening that occur in single-cycle processes.
2Manufacturing precision
If multiple lithography and etch cycles are used, then feature formation accuracy is improved, but manufacturing process complexity increases
Solution Approach 1:
The patent introduces spacer layers as intermediary structures between lithography and etch cycles. These spacers serve as self-aligned masks that define subsequent trench locations, eliminating the need for additional alignment steps and reducing overall process complexity despite multiple cycles being required.
Solution Approach 2:
The patent performs preliminary actions by forming spacer layers and hard masks before the actual trench etching. This preliminary structuring establishes precise geometric constraints that guide subsequent etch processes, ensuring accurate feature formation while streamlining the overall process flow.
3Area of moving object
If feature size is scaled down, then device density is increased, but irregularities and distortions in patterns increase
Solution Approach 1:
The patent changes the parameters of the lithography and etch processes by using multiple cycles with different exposure and etch conditions optimized for small features. Each cycle is tuned to specific parameter ranges that maintain pattern regularity even as feature dimensions are reduced to increase device density.
Data Source
AI summary
A method includes forming a material layer over a substrate, forming a first hard mask (HM) layer over the material layer, forming a first trench, along a first direction, in the first HM layer. The method also includes forming first spacers along sidewalls of the first trench, forming a second trench in the first HM layer parallel to the first trench, by using the first spacers to guard the first trench. The method also includes etching the material layer through the first trench and the second trench, removing the first HM layer and the first spacers, forming a second HM layer over the material layer, forming a third trench in the second HM layer. The third trench extends along a second direction that is perpendicular to the first direction and overlaps with the first trench. The method also includes etching the material layer through the third trench.